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/tmp/gdb-7.10/gdb/mips-tdep.h
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1 /* Target-dependent header for the MIPS architecture, for GDB, the GNU Debugger.
2 
3  Copyright (C) 2002-2015 Free Software Foundation, Inc.
4 
5  This file is part of GDB.
6 
7  This program is free software; you can redistribute it and/or modify
8  it under the terms of the GNU General Public License as published by
9  the Free Software Foundation; either version 3 of the License, or
10  (at your option) any later version.
11 
12  This program is distributed in the hope that it will be useful,
13  but WITHOUT ANY WARRANTY; without even the implied warranty of
14  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15  GNU General Public License for more details.
16 
17  You should have received a copy of the GNU General Public License
18  along with this program. If not, see <http://www.gnu.org/licenses/>. */
19 
20 #ifndef MIPS_TDEP_H
21 #define MIPS_TDEP_H
22 
23 #include "objfiles.h"
24 
25 struct gdbarch;
26 
27 /* All the possible MIPS ABIs. */
29  {
38  };
39 
40 /* Return the MIPS ABI associated with GDBARCH. */
41 enum mips_abi mips_abi (struct gdbarch *gdbarch);
42 
43 /* Base and compressed MIPS ISA variations. */
45  {
46  ISA_MIPS = -1, /* mips_compression_string depends on it. */
49  };
50 
51 /* Corresponding MSYMBOL_TARGET_FLAG aliases. */
52 #define MSYMBOL_TARGET_FLAG_MIPS16 MSYMBOL_TARGET_FLAG_1
53 #define MSYMBOL_TARGET_FLAG_MICROMIPS MSYMBOL_TARGET_FLAG_2
54 
55 /* Return the MIPS ISA's register size. Just a short cut to the BFD
56  architecture's word size. */
57 extern int mips_isa_regsize (struct gdbarch *gdbarch);
58 
59 /* Return the current index for various MIPS registers. */
61 {
62  int pc;
63  int fp0;
66  int badvaddr; /* Bad vaddr for addressing exception. */
67  int cause; /* Describes last exception. */
68  int hi; /* Multiply/divide temp. */
69  int lo; /* ... */
70  int dspacc; /* SmartMIPS/DSP accumulators. */
71  int dspctl; /* DSP control. */
72 };
73 extern const struct mips_regnum *mips_regnum (struct gdbarch *gdbarch);
74 
75 /* Some MIPS boards don't support floating point while others only
76  support single-precision floating-point operations. */
77 
79 {
80  MIPS_FPU_DOUBLE, /* Full double precision floating point. */
81  MIPS_FPU_SINGLE, /* Single precision floating point (R4650). */
82  MIPS_FPU_NONE /* No floating point. */
83 };
84 
85 /* MIPS specific per-architecture information. */
86 struct gdbarch_tdep
87 {
88  /* from the elf header */
89  int elf_flags;
90 
91  /* mips options */
93  enum mips_abi found_abi;
99  /* Is the target using 64-bit raw integer registers but only
100  storing a left-aligned 32-bit value in each? */
102  /* Indexes for various registers. IRIX and embedded have
103  different values. This contains the "public" fields. Don't
104  add any that do not need to be public. */
105  const struct mips_regnum *regnum;
106  /* Register names table for the current register set. */
108 
109  /* The size of register data available from the target, if known.
110  This doesn't quite obsolete the manual
111  mips64_transfers_32bit_regs_p, since that is documented to force
112  left alignment even for big endian (very strange). */
115 
116  /* Return the expected next PC if FRAME is stopped at a syscall
117  instruction. */
118  CORE_ADDR (*syscall_next_pc) (struct frame_info *frame);
119 };
120 
121 /* Register numbers of various important registers. */
122 
123 enum
124 {
125  MIPS_ZERO_REGNUM = 0, /* Read-only register, always 0. */
127  MIPS_V0_REGNUM = 2, /* Function integer return value. */
128  MIPS_A0_REGNUM = 4, /* Loc of first arg during a subr call. */
129  MIPS_S2_REGNUM = 18, /* Contains return address in MIPS16 thunks. */
130  MIPS_T9_REGNUM = 25, /* Contains address of callee in PIC. */
134  MIPS_PS_REGNUM = 32, /* Contains processor status. */
141  MIPS_UNUSED_REGNUM = 73, /* Never used, FIXME. */
142  MIPS_FIRST_EMBED_REGNUM = 74, /* First CP0 register for embedded use. */
143  MIPS_PRID_REGNUM = 89, /* Processor ID. */
144  MIPS_LAST_EMBED_REGNUM = 89 /* Last one. */
145 };
146 
147 /* Defined in mips-tdep.c and used in remote-mips.c. */
148 extern void deprecated_mips_set_processor_regs_hack (void);
149 
150 /* Instruction sizes and other useful constants. */
151 enum
152 {
155  /* The number of floating-point or integer registers. */
157 };
158 
159 /* Single step based on where the current instruction will take us. */
160 extern int mips_software_single_step (struct frame_info *frame);
161 
162 /* Strip the ISA (compression) bit off from ADDR. */
164 
165 /* Tell if the program counter value in MEMADDR is in a standard
166  MIPS function. */
167 extern int mips_pc_is_mips (bfd_vma memaddr);
168 
169 /* Tell if the program counter value in MEMADDR is in a MIPS16
170  function. */
171 extern int mips_pc_is_mips16 (struct gdbarch *gdbarch, bfd_vma memaddr);
172 
173 /* Tell if the program counter value in MEMADDR is in a microMIPS
174  function. */
175 extern int mips_pc_is_micromips (struct gdbarch *gdbarch, bfd_vma memaddr);
176 
177 /* Return the currently configured (or set) saved register size. */
178 extern unsigned int mips_abi_regsize (struct gdbarch *gdbarch);
179 
180 /* Make PC the address of the next instruction to execute. */
181 extern void mips_write_pc (struct regcache *regcache, CORE_ADDR pc);
182 
183 /* Target descriptions which only indicate the size of general
184  registers. */
185 extern struct target_desc *mips_tdesc_gp32;
186 extern struct target_desc *mips_tdesc_gp64;
187 
188 /* Return non-zero if PC is in a MIPS SVR4 lazy binding stub section. */
189 
190 static inline int
192 {
193  return pc_in_section (pc, ".MIPS.stubs");
194 }
195 
196 #endif /* MIPS_TDEP_H */
CORE_ADDR(* syscall_next_pc)(struct frame_info *frame)
Definition: arm-tdep.h:206
bfd_vma CORE_ADDR
Definition: common-types.h:41
enum mips_isa mips_isa
Definition: mips-tdep.h:94
const char ** mips_processor_reg_names
Definition: mips-tdep.h:107
struct target_desc * mips_tdesc_gp64
Definition: mips-tdep.c:196
int default_mask_address_p
Definition: mips-tdep.h:98
mips_fpu_type
Definition: mips-tdep.h:78
int mips_pc_is_mips16(struct gdbarch *gdbarch, bfd_vma memaddr)
Definition: mips-tdep.c:1193
int mips_isa_regsize(struct gdbarch *gdbarch)
Definition: mips-tdep.c:242
unsigned int mips_abi_regsize(struct gdbarch *gdbarch)
Definition: mips-tdep.c:258
int register_size
Definition: mips-tdep.h:114
enum mips_abi found_abi
Definition: mips-tdep.h:93
int badvaddr
Definition: mips-tdep.h:66
const struct mips_regnum * mips_regnum(struct gdbarch *gdbarch)
Definition: mips-tdep.c:199
int mips_last_fp_arg_regnum
Definition: mips-tdep.h:97
int fp_implementation_revision
Definition: mips-tdep.h:64
int mips_pc_is_micromips(struct gdbarch *gdbarch, bfd_vma memaddr)
Definition: mips-tdep.c:1211
enum mips_fpu_type mips_fpu_type
Definition: mips-tdep.h:95
mips_isa
Definition: mips-tdep.h:44
enum mips_abi mips_abi
Definition: mips-tdep.h:92
struct target_desc * mips_tdesc_gp32
Definition: mips-tdep.c:195
void mips_write_pc(struct regcache *regcache, CORE_ADDR pc)
Definition: mips-tdep.c:1420
CORE_ADDR mips_unmake_compact_addr(CORE_ADDR addr)
Definition: mips-tdep.c:350
mips_abi
Definition: mips-tdep.h:28
int mips_software_single_step(struct frame_info *frame)
Definition: mips-tdep.c:4175
const struct mips_regnum * regnum
Definition: mips-tdep.h:105
void deprecated_mips_set_processor_regs_hack(void)
Definition: mips-tdep.c:7012
int mips64_transfers_32bit_regs_p
Definition: mips-tdep.h:101
int dspctl
Definition: mips-tdep.h:71
int register_size_valid_p
Definition: mips-tdep.h:113
int mips_last_arg_regnum
Definition: mips-tdep.h:96
int pc_in_section(CORE_ADDR pc, char *name)
Definition: objfiles.c:1384
CORE_ADDR addr
Definition: frame.c:119
int mips_pc_is_mips(bfd_vma memaddr)
Definition: mips-tdep.c:1175
int fp_control_status
Definition: mips-tdep.h:65
int dspacc
Definition: mips-tdep.h:70
static int in_mips_stubs_section(CORE_ADDR pc)
Definition: mips-tdep.h:191