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/tmp/gdb-7.10/gdb/alpha-tdep.c
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1 /* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
2 
3  Copyright (C) 1993-2015 Free Software Foundation, Inc.
4 
5  This file is part of GDB.
6 
7  This program is free software; you can redistribute it and/or modify
8  it under the terms of the GNU General Public License as published by
9  the Free Software Foundation; either version 3 of the License, or
10  (at your option) any later version.
11 
12  This program is distributed in the hope that it will be useful,
13  but WITHOUT ANY WARRANTY; without even the implied warranty of
14  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15  GNU General Public License for more details.
16 
17  You should have received a copy of the GNU General Public License
18  along with this program. If not, see <http://www.gnu.org/licenses/>. */
19 
20 #include "defs.h"
21 #include "doublest.h"
22 #include "frame.h"
23 #include "frame-unwind.h"
24 #include "frame-base.h"
25 #include "dwarf2-frame.h"
26 #include "inferior.h"
27 #include "symtab.h"
28 #include "value.h"
29 #include "gdbcmd.h"
30 #include "gdbcore.h"
31 #include "dis-asm.h"
32 #include "symfile.h"
33 #include "objfiles.h"
34 #include "linespec.h"
35 #include "regcache.h"
36 #include "reggroups.h"
37 #include "arch-utils.h"
38 #include "osabi.h"
39 #include "block.h"
40 #include "infcall.h"
41 #include "trad-frame.h"
42 
43 #include "elf-bfd.h"
44 
45 #include "alpha-tdep.h"
46 
47 /* Instruction decoding. The notations for registers, immediates and
48  opcodes are the same as the one used in Compaq's Alpha architecture
49  handbook. */
50 
51 #define INSN_OPCODE(insn) ((insn & 0xfc000000) >> 26)
52 
53 /* Memory instruction format */
54 #define MEM_RA(insn) ((insn & 0x03e00000) >> 21)
55 #define MEM_RB(insn) ((insn & 0x001f0000) >> 16)
56 #define MEM_DISP(insn) \
57  (((insn & 0x8000) == 0) ? (insn & 0xffff) : -((-insn) & 0xffff))
58 
59 static const int lda_opcode = 0x08;
60 static const int stq_opcode = 0x2d;
61 
62 /* Branch instruction format */
63 #define BR_RA(insn) MEM_RA(insn)
64 
65 static const int br_opcode = 0x30;
66 static const int bne_opcode = 0x3d;
67 
68 /* Operate instruction format */
69 #define OPR_FUNCTION(insn) ((insn & 0xfe0) >> 5)
70 #define OPR_HAS_IMMEDIATE(insn) ((insn & 0x1000) == 0x1000)
71 #define OPR_RA(insn) MEM_RA(insn)
72 #define OPR_RC(insn) ((insn & 0x1f))
73 #define OPR_LIT(insn) ((insn & 0x1fe000) >> 13)
74 
75 static const int subq_opcode = 0x10;
76 static const int subq_function = 0x29;
77 
78 
79 /* Return the name of the REGNO register.
80 
81  An empty name corresponds to a register number that used to
82  be used for a virtual register. That virtual register has
83  been removed, but the index is still reserved to maintain
84  compatibility with existing remote alpha targets. */
85 
86 static const char *
87 alpha_register_name (struct gdbarch *gdbarch, int regno)
88 {
89  static const char * const register_names[] =
90  {
91  "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
92  "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
93  "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
94  "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
95  "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
96  "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
97  "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
98  "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
99  "pc", "", "unique"
100  };
101 
102  if (regno < 0)
103  return NULL;
104  if (regno >= ARRAY_SIZE(register_names))
105  return NULL;
106  return register_names[regno];
107 }
108 
109 static int
110 alpha_cannot_fetch_register (struct gdbarch *gdbarch, int regno)
111 {
112  return (strlen (alpha_register_name (gdbarch, regno)) == 0);
113 }
114 
115 static int
116 alpha_cannot_store_register (struct gdbarch *gdbarch, int regno)
117 {
118  return (regno == ALPHA_ZERO_REGNUM
119  || strlen (alpha_register_name (gdbarch, regno)) == 0);
120 }
121 
122 static struct type *
123 alpha_register_type (struct gdbarch *gdbarch, int regno)
124 {
125  if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM)
126  return builtin_type (gdbarch)->builtin_data_ptr;
127  if (regno == ALPHA_PC_REGNUM)
128  return builtin_type (gdbarch)->builtin_func_ptr;
129 
130  /* Don't need to worry about little vs big endian until
131  some jerk tries to port to alpha-unicosmk. */
132  if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31)
133  return builtin_type (gdbarch)->builtin_double;
134 
135  return builtin_type (gdbarch)->builtin_int64;
136 }
137 
138 /* Is REGNUM a member of REGGROUP? */
139 
140 static int
141 alpha_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
142  struct reggroup *group)
143 {
144  /* Filter out any registers eliminated, but whose regnum is
145  reserved for backward compatibility, e.g. the vfp. */
146  if (gdbarch_register_name (gdbarch, regnum) == NULL
147  || *gdbarch_register_name (gdbarch, regnum) == '\0')
148  return 0;
149 
150  if (group == all_reggroup)
151  return 1;
152 
153  /* Zero should not be saved or restored. Technically it is a general
154  register (just as $f31 would be a float if we represented it), but
155  there's no point displaying it during "info regs", so leave it out
156  of all groups except for "all". */
157  if (regnum == ALPHA_ZERO_REGNUM)
158  return 0;
159 
160  /* All other registers are saved and restored. */
161  if (group == save_reggroup || group == restore_reggroup)
162  return 1;
163 
164  /* All other groups are non-overlapping. */
165 
166  /* Since this is really a PALcode memory slot... */
167  if (regnum == ALPHA_UNIQUE_REGNUM)
168  return group == system_reggroup;
169 
170  /* Force the FPCR to be considered part of the floating point state. */
171  if (regnum == ALPHA_FPCR_REGNUM)
172  return group == float_reggroup;
173 
174  if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 31)
175  return group == float_reggroup;
176  else
177  return group == general_reggroup;
178 }
179 
180 /* The following represents exactly the conversion performed by
181  the LDS instruction. This applies to both single-precision
182  floating point and 32-bit integers. */
183 
184 static void
185 alpha_lds (struct gdbarch *gdbarch, void *out, const void *in)
186 {
187  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
188  ULONGEST mem = extract_unsigned_integer (in, 4, byte_order);
189  ULONGEST frac = (mem >> 0) & 0x7fffff;
190  ULONGEST sign = (mem >> 31) & 1;
191  ULONGEST exp_msb = (mem >> 30) & 1;
192  ULONGEST exp_low = (mem >> 23) & 0x7f;
193  ULONGEST exp, reg;
194 
195  exp = (exp_msb << 10) | exp_low;
196  if (exp_msb)
197  {
198  if (exp_low == 0x7f)
199  exp = 0x7ff;
200  }
201  else
202  {
203  if (exp_low != 0x00)
204  exp |= 0x380;
205  }
206 
207  reg = (sign << 63) | (exp << 52) | (frac << 29);
208  store_unsigned_integer (out, 8, byte_order, reg);
209 }
210 
211 /* Similarly, this represents exactly the conversion performed by
212  the STS instruction. */
213 
214 static void
215 alpha_sts (struct gdbarch *gdbarch, void *out, const void *in)
216 {
217  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
218  ULONGEST reg, mem;
219 
220  reg = extract_unsigned_integer (in, 8, byte_order);
221  mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff);
222  store_unsigned_integer (out, 4, byte_order, mem);
223 }
224 
225 /* The alpha needs a conversion between register and memory format if the
226  register is a floating point register and memory format is float, as the
227  register format must be double or memory format is an integer with 4
228  bytes or less, as the representation of integers in floating point
229  registers is different. */
230 
231 static int
232 alpha_convert_register_p (struct gdbarch *gdbarch, int regno,
233  struct type *type)
234 {
235  return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31
236  && TYPE_LENGTH (type) != 8);
237 }
238 
239 static int
241  struct type *valtype, gdb_byte *out,
242  int *optimizedp, int *unavailablep)
243 {
244  struct gdbarch *gdbarch = get_frame_arch (frame);
246 
247  /* Convert to TYPE. */
248  if (!get_frame_register_bytes (frame, regnum, 0,
249  register_size (gdbarch, regnum),
250  in, optimizedp, unavailablep))
251  return 0;
252 
253  if (TYPE_LENGTH (valtype) == 4)
254  {
255  alpha_sts (gdbarch, out, in);
256  *optimizedp = *unavailablep = 0;
257  return 1;
258  }
259 
260  error (_("Cannot retrieve value from floating point register"));
261 }
262 
263 static void
265  struct type *valtype, const gdb_byte *in)
266 {
268 
269  switch (TYPE_LENGTH (valtype))
270  {
271  case 4:
272  alpha_lds (get_frame_arch (frame), out, in);
273  break;
274  default:
275  error (_("Cannot store value in floating point register"));
276  }
277  put_frame_register (frame, regnum, out);
278 }
279 
280 
281 /* The alpha passes the first six arguments in the registers, the rest on
282  the stack. The register arguments are stored in ARG_REG_BUFFER, and
283  then moved into the register file; this simplifies the passing of a
284  large struct which extends from the registers to the stack, plus avoids
285  three ptrace invocations per word.
286 
287  We don't bother tracking which register values should go in integer
288  regs or fp regs; we load the same values into both.
289 
290  If the called function is returning a structure, the address of the
291  structure to be returned is passed as a hidden first argument. */
292 
293 static CORE_ADDR
294 alpha_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
295  struct regcache *regcache, CORE_ADDR bp_addr,
296  int nargs, struct value **args, CORE_ADDR sp,
297  int struct_return, CORE_ADDR struct_addr)
298 {
299  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
300  int i;
301  int accumulate_size = struct_return ? 8 : 0;
302  struct alpha_arg
303  {
304  const gdb_byte *contents;
305  int len;
306  int offset;
307  };
308  struct alpha_arg *alpha_args
309  = (struct alpha_arg *) alloca (nargs * sizeof (struct alpha_arg));
310  struct alpha_arg *m_arg;
312  int required_arg_regs;
313  CORE_ADDR func_addr = find_function_addr (function, NULL);
314 
315  /* The ABI places the address of the called function in T12. */
316  regcache_cooked_write_signed (regcache, ALPHA_T12_REGNUM, func_addr);
317 
318  /* Set the return address register to point to the entry point
319  of the program, where a breakpoint lies in wait. */
320  regcache_cooked_write_signed (regcache, ALPHA_RA_REGNUM, bp_addr);
321 
322  /* Lay out the arguments in memory. */
323  for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
324  {
325  struct value *arg = args[i];
326  struct type *arg_type = check_typedef (value_type (arg));
327 
328  /* Cast argument to long if necessary as the compiler does it too. */
329  switch (TYPE_CODE (arg_type))
330  {
331  case TYPE_CODE_INT:
332  case TYPE_CODE_BOOL:
333  case TYPE_CODE_CHAR:
334  case TYPE_CODE_RANGE:
335  case TYPE_CODE_ENUM:
336  if (TYPE_LENGTH (arg_type) == 4)
337  {
338  /* 32-bit values must be sign-extended to 64 bits
339  even if the base data type is unsigned. */
340  arg_type = builtin_type (gdbarch)->builtin_int32;
341  arg = value_cast (arg_type, arg);
342  }
343  if (TYPE_LENGTH (arg_type) < ALPHA_REGISTER_SIZE)
344  {
345  arg_type = builtin_type (gdbarch)->builtin_int64;
346  arg = value_cast (arg_type, arg);
347  }
348  break;
349 
350  case TYPE_CODE_FLT:
351  /* "float" arguments loaded in registers must be passed in
352  register format, aka "double". */
353  if (accumulate_size < sizeof (arg_reg_buffer)
354  && TYPE_LENGTH (arg_type) == 4)
355  {
356  arg_type = builtin_type (gdbarch)->builtin_double;
357  arg = value_cast (arg_type, arg);
358  }
359  /* Tru64 5.1 has a 128-bit long double, and passes this by
360  invisible reference. No one else uses this data type. */
361  else if (TYPE_LENGTH (arg_type) == 16)
362  {
363  /* Allocate aligned storage. */
364  sp = (sp & -16) - 16;
365 
366  /* Write the real data into the stack. */
367  write_memory (sp, value_contents (arg), 16);
368 
369  /* Construct the indirection. */
370  arg_type = lookup_pointer_type (arg_type);
371  arg = value_from_pointer (arg_type, sp);
372  }
373  break;
374 
375  case TYPE_CODE_COMPLEX:
376  /* ??? The ABI says that complex values are passed as two
377  separate scalar values. This distinction only matters
378  for complex float. However, GCC does not implement this. */
379 
380  /* Tru64 5.1 has a 128-bit long double, and passes this by
381  invisible reference. */
382  if (TYPE_LENGTH (arg_type) == 32)
383  {
384  /* Allocate aligned storage. */
385  sp = (sp & -16) - 16;
386 
387  /* Write the real data into the stack. */
388  write_memory (sp, value_contents (arg), 32);
389 
390  /* Construct the indirection. */
391  arg_type = lookup_pointer_type (arg_type);
392  arg = value_from_pointer (arg_type, sp);
393  }
394  break;
395 
396  default:
397  break;
398  }
399  m_arg->len = TYPE_LENGTH (arg_type);
400  m_arg->offset = accumulate_size;
401  accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
402  m_arg->contents = value_contents (arg);
403  }
404 
405  /* Determine required argument register loads, loading an argument register
406  is expensive as it uses three ptrace calls. */
407  required_arg_regs = accumulate_size / 8;
408  if (required_arg_regs > ALPHA_NUM_ARG_REGS)
409  required_arg_regs = ALPHA_NUM_ARG_REGS;
410 
411  /* Make room for the arguments on the stack. */
412  if (accumulate_size < sizeof(arg_reg_buffer))
413  accumulate_size = 0;
414  else
415  accumulate_size -= sizeof(arg_reg_buffer);
416  sp -= accumulate_size;
417 
418  /* Keep sp aligned to a multiple of 16 as the ABI requires. */
419  sp &= ~15;
420 
421  /* `Push' arguments on the stack. */
422  for (i = nargs; m_arg--, --i >= 0;)
423  {
424  const gdb_byte *contents = m_arg->contents;
425  int offset = m_arg->offset;
426  int len = m_arg->len;
427 
428  /* Copy the bytes destined for registers into arg_reg_buffer. */
429  if (offset < sizeof(arg_reg_buffer))
430  {
431  if (offset + len <= sizeof(arg_reg_buffer))
432  {
433  memcpy (arg_reg_buffer + offset, contents, len);
434  continue;
435  }
436  else
437  {
438  int tlen = sizeof(arg_reg_buffer) - offset;
439  memcpy (arg_reg_buffer + offset, contents, tlen);
440  offset += tlen;
441  contents += tlen;
442  len -= tlen;
443  }
444  }
445 
446  /* Everything else goes to the stack. */
447  write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
448  }
449  if (struct_return)
451  byte_order, struct_addr);
452 
453  /* Load the argument registers. */
454  for (i = 0; i < required_arg_regs; i++)
455  {
456  regcache_cooked_write (regcache, ALPHA_A0_REGNUM + i,
457  arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
459  arg_reg_buffer + i*ALPHA_REGISTER_SIZE);
460  }
461 
462  /* Finally, update the stack pointer. */
464 
465  return sp;
466 }
467 
468 /* Extract from REGCACHE the value about to be returned from a function
469  and copy it into VALBUF. */
470 
471 static void
473  gdb_byte *valbuf)
474 {
475  struct gdbarch *gdbarch = get_regcache_arch (regcache);
476  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
477  gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
478  ULONGEST l;
479 
480  switch (TYPE_CODE (valtype))
481  {
482  case TYPE_CODE_FLT:
483  switch (TYPE_LENGTH (valtype))
484  {
485  case 4:
486  regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, raw_buffer);
487  alpha_sts (gdbarch, valbuf, raw_buffer);
488  break;
489 
490  case 8:
491  regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
492  break;
493 
494  case 16:
496  read_memory (l, valbuf, 16);
497  break;
498 
499  default:
500  internal_error (__FILE__, __LINE__,
501  _("unknown floating point width"));
502  }
503  break;
504 
505  case TYPE_CODE_COMPLEX:
506  switch (TYPE_LENGTH (valtype))
507  {
508  case 8:
509  /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
510  regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
511  break;
512 
513  case 16:
514  regcache_cooked_read (regcache, ALPHA_FP0_REGNUM, valbuf);
515  regcache_cooked_read (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8);
516  break;
517 
518  case 32:
520  read_memory (l, valbuf, 32);
521  break;
522 
523  default:
524  internal_error (__FILE__, __LINE__,
525  _("unknown floating point width"));
526  }
527  break;
528 
529  default:
530  /* Assume everything else degenerates to an integer. */
532  store_unsigned_integer (valbuf, TYPE_LENGTH (valtype), byte_order, l);
533  break;
534  }
535 }
536 
537 /* Insert the given value into REGCACHE as if it was being
538  returned by a function. */
539 
540 static void
541 alpha_store_return_value (struct type *valtype, struct regcache *regcache,
542  const gdb_byte *valbuf)
543 {
544  struct gdbarch *gdbarch = get_regcache_arch (regcache);
545  gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
546  ULONGEST l;
547 
548  switch (TYPE_CODE (valtype))
549  {
550  case TYPE_CODE_FLT:
551  switch (TYPE_LENGTH (valtype))
552  {
553  case 4:
554  alpha_lds (gdbarch, raw_buffer, valbuf);
555  regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, raw_buffer);
556  break;
557 
558  case 8:
559  regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
560  break;
561 
562  case 16:
563  /* FIXME: 128-bit long doubles are returned like structures:
564  by writing into indirect storage provided by the caller
565  as the first argument. */
566  error (_("Cannot set a 128-bit long double return value."));
567 
568  default:
569  internal_error (__FILE__, __LINE__,
570  _("unknown floating point width"));
571  }
572  break;
573 
574  case TYPE_CODE_COMPLEX:
575  switch (TYPE_LENGTH (valtype))
576  {
577  case 8:
578  /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
579  regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
580  break;
581 
582  case 16:
583  regcache_cooked_write (regcache, ALPHA_FP0_REGNUM, valbuf);
584  regcache_cooked_write (regcache, ALPHA_FP0_REGNUM + 1, valbuf + 8);
585  break;
586 
587  case 32:
588  /* FIXME: 128-bit long doubles are returned like structures:
589  by writing into indirect storage provided by the caller
590  as the first argument. */
591  error (_("Cannot set a 128-bit long double return value."));
592 
593  default:
594  internal_error (__FILE__, __LINE__,
595  _("unknown floating point width"));
596  }
597  break;
598 
599  default:
600  /* Assume everything else degenerates to an integer. */
601  /* 32-bit values must be sign-extended to 64 bits
602  even if the base data type is unsigned. */
603  if (TYPE_LENGTH (valtype) == 4)
604  valtype = builtin_type (gdbarch)->builtin_int32;
605  l = unpack_long (valtype, valbuf);
607  break;
608  }
609 }
610 
611 static enum return_value_convention
612 alpha_return_value (struct gdbarch *gdbarch, struct value *function,
613  struct type *type, struct regcache *regcache,
614  gdb_byte *readbuf, const gdb_byte *writebuf)
615 {
616  enum type_code code = TYPE_CODE (type);
617 
618  if ((code == TYPE_CODE_STRUCT
619  || code == TYPE_CODE_UNION
620  || code == TYPE_CODE_ARRAY)
621  && gdbarch_tdep (gdbarch)->return_in_memory (type))
622  {
623  if (readbuf)
624  {
625  ULONGEST addr;
626  regcache_raw_read_unsigned (regcache, ALPHA_V0_REGNUM, &addr);
627  read_memory (addr, readbuf, TYPE_LENGTH (type));
628  }
629 
631  }
632 
633  if (readbuf)
634  alpha_extract_return_value (type, regcache, readbuf);
635  if (writebuf)
636  alpha_store_return_value (type, regcache, writebuf);
637 
639 }
640 
641 static int
643 {
644  return 1;
645 }
646 
647 static const gdb_byte *
648 alpha_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
649 {
650  static const gdb_byte break_insn[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */
651 
652  *len = sizeof(break_insn);
653  return break_insn;
654 }
655 
656 
657 /* This returns the PC of the first insn after the prologue.
658  If we can't find the prologue, then return 0. */
659 
660 CORE_ADDR
662 {
663  struct symtab_and_line sal;
664  CORE_ADDR func_addr, func_end;
665 
666  if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
667  return 0;
668 
669  sal = find_pc_line (func_addr, 0);
670  if (sal.end < func_end)
671  return sal.end;
672 
673  /* The line after the prologue is after the end of the function. In this
674  case, tell the caller to find the prologue the hard way. */
675  return 0;
676 }
677 
678 /* Read an instruction from memory at PC, looking through breakpoints. */
679 
680 unsigned int
681 alpha_read_insn (struct gdbarch *gdbarch, CORE_ADDR pc)
682 {
683  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
685  int status;
686 
687  status = target_read_memory (pc, buf, sizeof (buf));
688  if (status)
689  memory_error (status, pc);
690  return extract_unsigned_integer (buf, sizeof (buf), byte_order);
691 }
692 
693 /* To skip prologues, I use this predicate. Returns either PC itself
694  if the code at PC does not look like a function prologue; otherwise
695  returns an address that (if we're lucky) follows the prologue. If
696  LENIENT, then we must skip everything which is involved in setting
697  up the frame (it's OK to skip more, just so long as we don't skip
698  anything which might clobber the registers which are being saved. */
699 
700 static CORE_ADDR
701 alpha_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
702 {
703  unsigned long inst;
704  int offset;
705  CORE_ADDR post_prologue_pc;
707 
708  /* Silently return the unaltered pc upon memory errors.
709  This could happen on OSF/1 if decode_line_1 tries to skip the
710  prologue for quickstarted shared library functions when the
711  shared library is not yet mapped in.
712  Reading target memory is slow over serial lines, so we perform
713  this check only if the target has shared libraries (which all
714  Alpha targets do). */
715  if (target_read_memory (pc, buf, sizeof (buf)))
716  return pc;
717 
718  /* See if we can determine the end of the prologue via the symbol table.
719  If so, then return either PC, or the PC after the prologue, whichever
720  is greater. */
721 
722  post_prologue_pc = alpha_after_prologue (pc);
723  if (post_prologue_pc != 0)
724  return max (pc, post_prologue_pc);
725 
726  /* Can't determine prologue from the symbol table, need to examine
727  instructions. */
728 
729  /* Skip the typical prologue instructions. These are the stack adjustment
730  instruction and the instructions that save registers on the stack
731  or in the gcc frame. */
732  for (offset = 0; offset < 100; offset += ALPHA_INSN_SIZE)
733  {
734  inst = alpha_read_insn (gdbarch, pc + offset);
735 
736  if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
737  continue;
738  if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
739  continue;
740  if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
741  continue;
742  if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
743  continue;
744 
745  if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
746  || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
747  && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
748  continue;
749 
750  if (inst == 0x47de040f) /* bis sp,sp,fp */
751  continue;
752  if (inst == 0x47fe040f) /* bis zero,sp,fp */
753  continue;
754 
755  break;
756  }
757  return pc + offset;
758 }
759 
760 
761 static const int ldl_l_opcode = 0x2a;
762 static const int ldq_l_opcode = 0x2b;
763 static const int stl_c_opcode = 0x2e;
764 static const int stq_c_opcode = 0x2f;
765 
766 /* Checks for an atomic sequence of instructions beginning with a LDL_L/LDQ_L
767  instruction and ending with a STL_C/STQ_C instruction. If such a sequence
768  is found, attempt to step through it. A breakpoint is placed at the end of
769  the sequence. */
770 
771 static int
773 {
774  struct gdbarch *gdbarch = get_frame_arch (frame);
775  struct address_space *aspace = get_frame_address_space (frame);
776  CORE_ADDR pc = get_frame_pc (frame);
777  CORE_ADDR breaks[2] = {-1, -1};
778  CORE_ADDR loc = pc;
779  CORE_ADDR closing_insn; /* Instruction that closes the atomic sequence. */
780  unsigned int insn = alpha_read_insn (gdbarch, loc);
781  int insn_count;
782  int index;
783  int last_breakpoint = 0; /* Defaults to 0 (no breakpoints placed). */
784  const int atomic_sequence_length = 16; /* Instruction sequence length. */
785  int bc_insn_count = 0; /* Conditional branch instruction count. */
786 
787  /* Assume all atomic sequences start with a LDL_L/LDQ_L instruction. */
788  if (INSN_OPCODE (insn) != ldl_l_opcode
789  && INSN_OPCODE (insn) != ldq_l_opcode)
790  return 0;
791 
792  /* Assume that no atomic sequence is longer than "atomic_sequence_length"
793  instructions. */
794  for (insn_count = 0; insn_count < atomic_sequence_length; ++insn_count)
795  {
796  loc += ALPHA_INSN_SIZE;
797  insn = alpha_read_insn (gdbarch, loc);
798 
799  /* Assume that there is at most one branch in the atomic
800  sequence. If a branch is found, put a breakpoint in
801  its destination address. */
802  if (INSN_OPCODE (insn) >= br_opcode)
803  {
804  int immediate = (insn & 0x001fffff) << 2;
805 
806  immediate = (immediate ^ 0x400000) - 0x400000;
807 
808  if (bc_insn_count >= 1)
809  return 0; /* More than one branch found, fallback
810  to the standard single-step code. */
811 
812  breaks[1] = loc + ALPHA_INSN_SIZE + immediate;
813 
814  bc_insn_count++;
815  last_breakpoint++;
816  }
817 
818  if (INSN_OPCODE (insn) == stl_c_opcode
819  || INSN_OPCODE (insn) == stq_c_opcode)
820  break;
821  }
822 
823  /* Assume that the atomic sequence ends with a STL_C/STQ_C instruction. */
824  if (INSN_OPCODE (insn) != stl_c_opcode
825  && INSN_OPCODE (insn) != stq_c_opcode)
826  return 0;
827 
828  closing_insn = loc;
829  loc += ALPHA_INSN_SIZE;
830 
831  /* Insert a breakpoint right after the end of the atomic sequence. */
832  breaks[0] = loc;
833 
834  /* Check for duplicated breakpoints. Check also for a breakpoint
835  placed (branch instruction's destination) anywhere in sequence. */
836  if (last_breakpoint
837  && (breaks[1] == breaks[0]
838  || (breaks[1] >= pc && breaks[1] <= closing_insn)))
839  last_breakpoint = 0;
840 
841  /* Effectively inserts the breakpoints. */
842  for (index = 0; index <= last_breakpoint; index++)
843  insert_single_step_breakpoint (gdbarch, aspace, breaks[index]);
844 
845  return 1;
846 }
847 
848 
849 /* Figure out where the longjmp will land.
850  We expect the first arg to be a pointer to the jmp_buf structure from
851  which we extract the PC (JB_PC) that we will land at. The PC is copied
852  into the "pc". This routine returns true on success. */
853 
854 static int
856 {
857  struct gdbarch *gdbarch = get_frame_arch (frame);
858  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
859  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
860  CORE_ADDR jb_addr;
861  gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
862 
863  jb_addr = get_frame_register_unsigned (frame, ALPHA_A0_REGNUM);
864 
865  if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
866  raw_buffer, tdep->jb_elt_size))
867  return 0;
868 
869  *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size, byte_order);
870  return 1;
871 }
872 
873 
874 /* Frame unwinder for signal trampolines. We use alpha tdep bits that
875  describe the location and shape of the sigcontext structure. After
876  that, all registers are in memory, so it's easy. */
877 /* ??? Shouldn't we be able to do this generically, rather than with
878  OSABI data specific to Alpha? */
879 
881 {
883 };
884 
885 static struct alpha_sigtramp_unwind_cache *
887  void **this_prologue_cache)
888 {
889  struct alpha_sigtramp_unwind_cache *info;
890  struct gdbarch_tdep *tdep;
891 
892  if (*this_prologue_cache)
893  return *this_prologue_cache;
894 
896  *this_prologue_cache = info;
897 
898  tdep = gdbarch_tdep (get_frame_arch (this_frame));
899  info->sigcontext_addr = tdep->sigcontext_addr (this_frame);
900 
901  return info;
902 }
903 
904 /* Return the address of REGNUM in a sigtramp frame. Since this is
905  all arithmetic, it doesn't seem worthwhile to cache it. */
906 
907 static CORE_ADDR
908 alpha_sigtramp_register_address (struct gdbarch *gdbarch,
910 {
911  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
912 
913  if (regnum >= 0 && regnum < 32)
914  return sigcontext_addr + tdep->sc_regs_offset + regnum * 8;
915  else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32)
916  return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8;
917  else if (regnum == ALPHA_PC_REGNUM)
918  return sigcontext_addr + tdep->sc_pc_offset;
919 
920  return 0;
921 }
922 
923 /* Given a GDB frame, determine the address of the calling function's
924  frame. This will be used to create a new GDB frame struct. */
925 
926 static void
928  void **this_prologue_cache,
929  struct frame_id *this_id)
930 {
931  struct gdbarch *gdbarch = get_frame_arch (this_frame);
932  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
933  struct alpha_sigtramp_unwind_cache *info
934  = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
935  CORE_ADDR stack_addr, code_addr;
936 
937  /* If the OSABI couldn't locate the sigcontext, give up. */
938  if (info->sigcontext_addr == 0)
939  return;
940 
941  /* If we have dynamic signal trampolines, find their start.
942  If we do not, then we must assume there is a symbol record
943  that can provide the start address. */
944  if (tdep->dynamic_sigtramp_offset)
945  {
946  int offset;
947  code_addr = get_frame_pc (this_frame);
948  offset = tdep->dynamic_sigtramp_offset (gdbarch, code_addr);
949  if (offset >= 0)
950  code_addr -= offset;
951  else
952  code_addr = 0;
953  }
954  else
955  code_addr = get_frame_func (this_frame);
956 
957  /* The stack address is trivially read from the sigcontext. */
958  stack_addr = alpha_sigtramp_register_address (gdbarch, info->sigcontext_addr,
960  stack_addr = get_frame_memory_unsigned (this_frame, stack_addr,
962 
963  *this_id = frame_id_build (stack_addr, code_addr);
964 }
965 
966 /* Retrieve the value of REGNUM in FRAME. Don't give up! */
967 
968 static struct value *
970  void **this_prologue_cache, int regnum)
971 {
972  struct alpha_sigtramp_unwind_cache *info
973  = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
974  CORE_ADDR addr;
975 
976  if (info->sigcontext_addr != 0)
977  {
978  /* All integer and fp registers are stored in memory. */
979  addr = alpha_sigtramp_register_address (get_frame_arch (this_frame),
980  info->sigcontext_addr, regnum);
981  if (addr != 0)
982  return frame_unwind_got_memory (this_frame, regnum, addr);
983  }
984 
985  /* This extra register may actually be in the sigcontext, but our
986  current description of it in alpha_sigtramp_frame_unwind_cache
987  doesn't include it. Too bad. Fall back on whatever's in the
988  outer frame. */
989  return frame_unwind_got_register (this_frame, regnum, regnum);
990 }
991 
992 static int
994  struct frame_info *this_frame,
995  void **this_prologue_cache)
996 {
997  struct gdbarch *gdbarch = get_frame_arch (this_frame);
998  CORE_ADDR pc = get_frame_pc (this_frame);
999  const char *name;
1000 
1001  /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead
1002  look at tramp-frame.h and other simplier per-architecture
1003  sigtramp unwinders. */
1004 
1005  /* We shouldn't even bother to try if the OSABI didn't register a
1006  sigcontext_addr handler or pc_in_sigtramp hander. */
1007  if (gdbarch_tdep (gdbarch)->sigcontext_addr == NULL)
1008  return 0;
1009  if (gdbarch_tdep (gdbarch)->pc_in_sigtramp == NULL)
1010  return 0;
1011 
1012  /* Otherwise we should be in a signal frame. */
1013  find_pc_partial_function (pc, &name, NULL, NULL);
1014  if (gdbarch_tdep (gdbarch)->pc_in_sigtramp (gdbarch, pc, name))
1015  return 1;
1016 
1017  return 0;
1018 }
1019 
1020 static const struct frame_unwind alpha_sigtramp_frame_unwind = {
1025  NULL,
1027 };
1028 
1029 
1030 
1031 /* Heuristic_proc_start may hunt through the text section for a long
1032  time across a 2400 baud serial line. Allows the user to limit this
1033  search. */
1034 static int heuristic_fence_post = 0;
1035 
1036 /* Attempt to locate the start of the function containing PC. We assume that
1037  the previous function ends with an about_to_return insn. Not foolproof by
1038  any means, since gcc is happy to put the epilogue in the middle of a
1039  function. But we're guessing anyway... */
1040 
1041 static CORE_ADDR
1042 alpha_heuristic_proc_start (struct gdbarch *gdbarch, CORE_ADDR pc)
1043 {
1044  struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1045  CORE_ADDR last_non_nop = pc;
1046  CORE_ADDR fence = pc - heuristic_fence_post;
1047  CORE_ADDR orig_pc = pc;
1048  CORE_ADDR func;
1049  struct inferior *inf;
1050 
1051  if (pc == 0)
1052  return 0;
1053 
1054  /* First see if we can find the start of the function from minimal
1055  symbol information. This can succeed with a binary that doesn't
1056  have debug info, but hasn't been stripped. */
1057  func = get_pc_function_start (pc);
1058  if (func)
1059  return func;
1060 
1061  if (heuristic_fence_post == -1
1062  || fence < tdep->vm_min_address)
1063  fence = tdep->vm_min_address;
1064 
1065  /* Search back for previous return; also stop at a 0, which might be
1066  seen for instance before the start of a code section. Don't include
1067  nops, since this usually indicates padding between functions. */
1068  for (pc -= ALPHA_INSN_SIZE; pc >= fence; pc -= ALPHA_INSN_SIZE)
1069  {
1070  unsigned int insn = alpha_read_insn (gdbarch, pc);
1071  switch (insn)
1072  {
1073  case 0: /* invalid insn */
1074  case 0x6bfa8001: /* ret $31,($26),1 */
1075  return last_non_nop;
1076 
1077  case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
1078  case 0x47ff041f: /* nop: bis $31,$31,$31 */
1079  break;
1080 
1081  default:
1082  last_non_nop = pc;
1083  break;
1084  }
1085  }
1086 
1087  inf = current_inferior ();
1088 
1089  /* It's not clear to me why we reach this point when stopping quietly,
1090  but with this test, at least we don't print out warnings for every
1091  child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
1092  if (inf->control.stop_soon == NO_STOP_QUIETLY)
1093  {
1094  static int blurb_printed = 0;
1095 
1096  if (fence == tdep->vm_min_address)
1097  warning (_("Hit beginning of text section without finding \
1098 enclosing function for address %s"), paddress (gdbarch, orig_pc));
1099  else
1100  warning (_("Hit heuristic-fence-post without finding \
1101 enclosing function for address %s"), paddress (gdbarch, orig_pc));
1102 
1103  if (!blurb_printed)
1104  {
1105  printf_filtered (_("\
1106 This warning occurs if you are debugging a function without any symbols\n\
1107 (for example, in a stripped executable). In that case, you may wish to\n\
1108 increase the size of the search with the `set heuristic-fence-post' command.\n\
1109 \n\
1110 Otherwise, you told GDB there was a function where there isn't one, or\n\
1111 (more likely) you have encountered a bug in GDB.\n"));
1112  blurb_printed = 1;
1113  }
1114  }
1115 
1116  return 0;
1117 }
1118 
1119 /* Fallback alpha frame unwinder. Uses instruction scanning and knows
1120  something about the traditional layout of alpha stack frames. */
1121 
1123 {
1128 };
1129 
1130 /* If a probing loop sequence starts at PC, simulate it and compute
1131  FRAME_SIZE and PC after its execution. Otherwise, return with PC and
1132  FRAME_SIZE unchanged. */
1133 
1134 static void
1135 alpha_heuristic_analyze_probing_loop (struct gdbarch *gdbarch, CORE_ADDR *pc,
1136  int *frame_size)
1137 {
1138  CORE_ADDR cur_pc = *pc;
1139  int cur_frame_size = *frame_size;
1140  int nb_of_iterations, reg_index, reg_probe;
1141  unsigned int insn;
1142 
1143  /* The following pattern is recognized as a probing loop:
1144 
1145  lda REG_INDEX,NB_OF_ITERATIONS
1146  lda REG_PROBE,<immediate>(sp)
1147 
1148  LOOP_START:
1149  stq zero,<immediate>(REG_PROBE)
1150  subq REG_INDEX,0x1,REG_INDEX
1151  lda REG_PROBE,<immediate>(REG_PROBE)
1152  bne REG_INDEX, LOOP_START
1153 
1154  lda sp,<immediate>(REG_PROBE)
1155 
1156  If anything different is found, the function returns without
1157  changing PC and FRAME_SIZE. Otherwise, PC will point immediately
1158  after this sequence, and FRAME_SIZE will be updated. */
1159 
1160  /* lda REG_INDEX,NB_OF_ITERATIONS */
1161 
1162  insn = alpha_read_insn (gdbarch, cur_pc);
1163  if (INSN_OPCODE (insn) != lda_opcode)
1164  return;
1165  reg_index = MEM_RA (insn);
1166  nb_of_iterations = MEM_DISP (insn);
1167 
1168  /* lda REG_PROBE,<immediate>(sp) */
1169 
1170  cur_pc += ALPHA_INSN_SIZE;
1171  insn = alpha_read_insn (gdbarch, cur_pc);
1172  if (INSN_OPCODE (insn) != lda_opcode
1173  || MEM_RB (insn) != ALPHA_SP_REGNUM)
1174  return;
1175  reg_probe = MEM_RA (insn);
1176  cur_frame_size -= MEM_DISP (insn);
1177 
1178  /* stq zero,<immediate>(REG_PROBE) */
1179 
1180  cur_pc += ALPHA_INSN_SIZE;
1181  insn = alpha_read_insn (gdbarch, cur_pc);
1182  if (INSN_OPCODE (insn) != stq_opcode
1183  || MEM_RA (insn) != 0x1f
1184  || MEM_RB (insn) != reg_probe)
1185  return;
1186 
1187  /* subq REG_INDEX,0x1,REG_INDEX */
1188 
1189  cur_pc += ALPHA_INSN_SIZE;
1190  insn = alpha_read_insn (gdbarch, cur_pc);
1191  if (INSN_OPCODE (insn) != subq_opcode
1192  || !OPR_HAS_IMMEDIATE (insn)
1193  || OPR_FUNCTION (insn) != subq_function
1194  || OPR_LIT(insn) != 1
1195  || OPR_RA (insn) != reg_index
1196  || OPR_RC (insn) != reg_index)
1197  return;
1198 
1199  /* lda REG_PROBE,<immediate>(REG_PROBE) */
1200 
1201  cur_pc += ALPHA_INSN_SIZE;
1202  insn = alpha_read_insn (gdbarch, cur_pc);
1203  if (INSN_OPCODE (insn) != lda_opcode
1204  || MEM_RA (insn) != reg_probe
1205  || MEM_RB (insn) != reg_probe)
1206  return;
1207  cur_frame_size -= MEM_DISP (insn) * nb_of_iterations;
1208 
1209  /* bne REG_INDEX, LOOP_START */
1210 
1211  cur_pc += ALPHA_INSN_SIZE;
1212  insn = alpha_read_insn (gdbarch, cur_pc);
1213  if (INSN_OPCODE (insn) != bne_opcode
1214  || MEM_RA (insn) != reg_index)
1215  return;
1216 
1217  /* lda sp,<immediate>(REG_PROBE) */
1218 
1219  cur_pc += ALPHA_INSN_SIZE;
1220  insn = alpha_read_insn (gdbarch, cur_pc);
1221  if (INSN_OPCODE (insn) != lda_opcode
1222  || MEM_RA (insn) != ALPHA_SP_REGNUM
1223  || MEM_RB (insn) != reg_probe)
1224  return;
1225  cur_frame_size -= MEM_DISP (insn);
1226 
1227  *pc = cur_pc;
1228  *frame_size = cur_frame_size;
1229 }
1230 
1231 static struct alpha_heuristic_unwind_cache *
1233  void **this_prologue_cache,
1235 {
1236  struct gdbarch *gdbarch = get_frame_arch (this_frame);
1237  struct alpha_heuristic_unwind_cache *info;
1238  ULONGEST val;
1239  CORE_ADDR limit_pc, cur_pc;
1240  int frame_reg, frame_size, return_reg, reg;
1241 
1242  if (*this_prologue_cache)
1243  return *this_prologue_cache;
1244 
1246  *this_prologue_cache = info;
1247  info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1248 
1249  limit_pc = get_frame_pc (this_frame);
1250  if (start_pc == 0)
1251  start_pc = alpha_heuristic_proc_start (gdbarch, limit_pc);
1252  info->start_pc = start_pc;
1253 
1254  frame_reg = ALPHA_SP_REGNUM;
1255  frame_size = 0;
1256  return_reg = -1;
1257 
1258  /* If we've identified a likely place to start, do code scanning. */
1259  if (start_pc != 0)
1260  {
1261  /* Limit the forward search to 50 instructions. */
1262  if (start_pc + 200 < limit_pc)
1263  limit_pc = start_pc + 200;
1264 
1265  for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += ALPHA_INSN_SIZE)
1266  {
1267  unsigned int word = alpha_read_insn (gdbarch, cur_pc);
1268 
1269  if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
1270  {
1271  if (word & 0x8000)
1272  {
1273  /* Consider only the first stack allocation instruction
1274  to contain the static size of the frame. */
1275  if (frame_size == 0)
1276  frame_size = (-word) & 0xffff;
1277  }
1278  else
1279  {
1280  /* Exit loop if a positive stack adjustment is found, which
1281  usually means that the stack cleanup code in the function
1282  epilogue is reached. */
1283  break;
1284  }
1285  }
1286  else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1287  {
1288  reg = (word & 0x03e00000) >> 21;
1289 
1290  /* Ignore this instruction if we have already encountered
1291  an instruction saving the same register earlier in the
1292  function code. The current instruction does not tell
1293  us where the original value upon function entry is saved.
1294  All it says is that the function we are scanning reused
1295  that register for some computation of its own, and is now
1296  saving its result. */
1297  if (trad_frame_addr_p(info->saved_regs, reg))
1298  continue;
1299 
1300  if (reg == 31)
1301  continue;
1302 
1303  /* Do not compute the address where the register was saved yet,
1304  because we don't know yet if the offset will need to be
1305  relative to $sp or $fp (we can not compute the address
1306  relative to $sp if $sp is updated during the execution of
1307  the current subroutine, for instance when doing some alloca).
1308  So just store the offset for the moment, and compute the
1309  address later when we know whether this frame has a frame
1310  pointer or not. */
1311  /* Hack: temporarily add one, so that the offset is non-zero
1312  and we can tell which registers have save offsets below. */
1313  info->saved_regs[reg].addr = (word & 0xffff) + 1;
1314 
1315  /* Starting with OSF/1-3.2C, the system libraries are shipped
1316  without local symbols, but they still contain procedure
1317  descriptors without a symbol reference. GDB is currently
1318  unable to find these procedure descriptors and uses
1319  heuristic_proc_desc instead.
1320  As some low level compiler support routines (__div*, __add*)
1321  use a non-standard return address register, we have to
1322  add some heuristics to determine the return address register,
1323  or stepping over these routines will fail.
1324  Usually the return address register is the first register
1325  saved on the stack, but assembler optimization might
1326  rearrange the register saves.
1327  So we recognize only a few registers (t7, t9, ra) within
1328  the procedure prologue as valid return address registers.
1329  If we encounter a return instruction, we extract the
1330  return address register from it.
1331 
1332  FIXME: Rewriting GDB to access the procedure descriptors,
1333  e.g. via the minimal symbol table, might obviate this
1334  hack. */
1335  if (return_reg == -1
1336  && cur_pc < (start_pc + 80)
1337  && (reg == ALPHA_T7_REGNUM
1338  || reg == ALPHA_T9_REGNUM
1339  || reg == ALPHA_RA_REGNUM))
1340  return_reg = reg;
1341  }
1342  else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1343  return_reg = (word >> 16) & 0x1f;
1344  else if (word == 0x47de040f) /* bis sp,sp,fp */
1345  frame_reg = ALPHA_GCC_FP_REGNUM;
1346  else if (word == 0x47fe040f) /* bis zero,sp,fp */
1347  frame_reg = ALPHA_GCC_FP_REGNUM;
1348 
1349  alpha_heuristic_analyze_probing_loop (gdbarch, &cur_pc, &frame_size);
1350  }
1351 
1352  /* If we haven't found a valid return address register yet, keep
1353  searching in the procedure prologue. */
1354  if (return_reg == -1)
1355  {
1356  while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
1357  {
1358  unsigned int word = alpha_read_insn (gdbarch, cur_pc);
1359 
1360  if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1361  {
1362  reg = (word & 0x03e00000) >> 21;
1363  if (reg == ALPHA_T7_REGNUM
1364  || reg == ALPHA_T9_REGNUM
1365  || reg == ALPHA_RA_REGNUM)
1366  {
1367  return_reg = reg;
1368  break;
1369  }
1370  }
1371  else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1372  {
1373  return_reg = (word >> 16) & 0x1f;
1374  break;
1375  }
1376 
1377  cur_pc += ALPHA_INSN_SIZE;
1378  }
1379  }
1380  }
1381 
1382  /* Failing that, do default to the customary RA. */
1383  if (return_reg == -1)
1384  return_reg = ALPHA_RA_REGNUM;
1385  info->return_reg = return_reg;
1386 
1387  val = get_frame_register_unsigned (this_frame, frame_reg);
1388  info->vfp = val + frame_size;
1389 
1390  /* Convert offsets to absolute addresses. See above about adding
1391  one to the offsets to make all detected offsets non-zero. */
1392  for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
1393  if (trad_frame_addr_p(info->saved_regs, reg))
1394  info->saved_regs[reg].addr += val - 1;
1395 
1396  /* The stack pointer of the previous frame is computed by popping
1397  the current stack frame. */
1400 
1401  return info;
1402 }
1403 
1404 /* Given a GDB frame, determine the address of the calling function's
1405  frame. This will be used to create a new GDB frame struct. */
1406 
1407 static void
1409  void **this_prologue_cache,
1410  struct frame_id *this_id)
1411 {
1412  struct alpha_heuristic_unwind_cache *info
1413  = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
1414 
1415  *this_id = frame_id_build (info->vfp, info->start_pc);
1416 }
1417 
1418 /* Retrieve the value of REGNUM in FRAME. Don't give up! */
1419 
1420 static struct value *
1422  void **this_prologue_cache, int regnum)
1423 {
1424  struct alpha_heuristic_unwind_cache *info
1425  = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
1426 
1427  /* The PC of the previous frame is stored in the link register of
1428  the current frame. Frob regnum so that we pull the value from
1429  the correct place. */
1430  if (regnum == ALPHA_PC_REGNUM)
1431  regnum = info->return_reg;
1432 
1433  return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
1434 }
1435 
1436 static const struct frame_unwind alpha_heuristic_frame_unwind = {
1437  NORMAL_FRAME,
1441  NULL,
1443 };
1444 
1445 static CORE_ADDR
1447  void **this_prologue_cache)
1448 {
1449  struct alpha_heuristic_unwind_cache *info
1450  = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
1451 
1452  return info->vfp;
1453 }
1454 
1455 static const struct frame_base alpha_heuristic_frame_base = {
1459  alpha_heuristic_frame_base_address
1460 };
1461 
1462 /* Just like reinit_frame_cache, but with the right arguments to be
1463  callable as an sfunc. Used by the "set heuristic-fence-post" command. */
1464 
1465 static void
1466 reinit_frame_cache_sfunc (char *args, int from_tty, struct cmd_list_element *c)
1467 {
1468  reinit_frame_cache ();
1469 }
1470 
1471 
1472 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1473  dummy frame. The frame ID's base needs to match the TOS value
1474  saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1475  breakpoint. */
1476 
1477 static struct frame_id
1478 alpha_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
1479 {
1480  ULONGEST base;
1481  base = get_frame_register_unsigned (this_frame, ALPHA_SP_REGNUM);
1482  return frame_id_build (base, get_frame_pc (this_frame));
1483 }
1484 
1485 static CORE_ADDR
1486 alpha_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1487 {
1488  ULONGEST pc;
1490  return pc;
1491 }
1492 
1493 
1494 /* Helper routines for alpha*-nat.c files to move register sets to and
1495  from core files. The UNIQUE pointer is allowed to be NULL, as most
1496  targets don't supply this value in their core files. */
1497 
1498 void
1500  const void *r0_r30, const void *pc, const void *unique)
1501 {
1502  const gdb_byte *regs = r0_r30;
1503  int i;
1504 
1505  for (i = 0; i < 31; ++i)
1506  if (regno == i || regno == -1)
1507  regcache_raw_supply (regcache, i, regs + i * 8);
1508 
1509  if (regno == ALPHA_ZERO_REGNUM || regno == -1)
1510  {
1511  const gdb_byte zero[8] = { 0 };
1512 
1513  regcache_raw_supply (regcache, ALPHA_ZERO_REGNUM, zero);
1514  }
1515 
1516  if (regno == ALPHA_PC_REGNUM || regno == -1)
1517  regcache_raw_supply (regcache, ALPHA_PC_REGNUM, pc);
1518 
1519  if (regno == ALPHA_UNIQUE_REGNUM || regno == -1)
1520  regcache_raw_supply (regcache, ALPHA_UNIQUE_REGNUM, unique);
1521 }
1522 
1523 void
1525  int regno, void *r0_r30, void *pc, void *unique)
1526 {
1527  gdb_byte *regs = r0_r30;
1528  int i;
1529 
1530  for (i = 0; i < 31; ++i)
1531  if (regno == i || regno == -1)
1532  regcache_raw_collect (regcache, i, regs + i * 8);
1533 
1534  if (regno == ALPHA_PC_REGNUM || regno == -1)
1535  regcache_raw_collect (regcache, ALPHA_PC_REGNUM, pc);
1536 
1537  if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1))
1538  regcache_raw_collect (regcache, ALPHA_UNIQUE_REGNUM, unique);
1539 }
1540 
1541 void
1543  const void *f0_f30, const void *fpcr)
1544 {
1545  const gdb_byte *regs = f0_f30;
1546  int i;
1547 
1548  for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1549  if (regno == i || regno == -1)
1550  regcache_raw_supply (regcache, i,
1551  regs + (i - ALPHA_FP0_REGNUM) * 8);
1552 
1553  if (regno == ALPHA_FPCR_REGNUM || regno == -1)
1554  regcache_raw_supply (regcache, ALPHA_FPCR_REGNUM, fpcr);
1555 }
1556 
1557 void
1559  int regno, void *f0_f30, void *fpcr)
1560 {
1561  gdb_byte *regs = f0_f30;
1562  int i;
1563 
1564  for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1565  if (regno == i || regno == -1)
1566  regcache_raw_collect (regcache, i,
1567  regs + (i - ALPHA_FP0_REGNUM) * 8);
1568 
1569  if (regno == ALPHA_FPCR_REGNUM || regno == -1)
1570  regcache_raw_collect (regcache, ALPHA_FPCR_REGNUM, fpcr);
1571 }
1572 
1573 
1574 
1575 /* Return nonzero if the G_floating register value in REG is equal to
1576  zero for FP control instructions. */
1577 
1578 static int
1580 {
1581  /* Check that all bits except the sign bit are zero. */
1582  const LONGEST zero_mask = ((LONGEST) 1 << 63) ^ -1;
1583 
1584  return ((reg & zero_mask) == 0);
1585 }
1586 
1587 /* Return the value of the sign bit for the G_floating register
1588  value held in REG. */
1589 
1590 static int
1592 {
1593  const LONGEST sign_mask = (LONGEST) 1 << 63;
1594 
1595  return ((reg & sign_mask) != 0);
1596 }
1597 
1598 /* alpha_software_single_step() is called just before we want to resume
1599  the inferior, if we want to single-step it but there is no hardware
1600  or kernel single-step support (NetBSD on Alpha, for example). We find
1601  the target of the coming instruction and breakpoint it. */
1602 
1603 static CORE_ADDR
1605 {
1606  struct gdbarch *gdbarch = get_frame_arch (frame);
1607  unsigned int insn;
1608  unsigned int op;
1609  int regno;
1610  int offset;
1611  LONGEST rav;
1612 
1613  insn = alpha_read_insn (gdbarch, pc);
1614 
1615  /* Opcode is top 6 bits. */
1616  op = (insn >> 26) & 0x3f;
1617 
1618  if (op == 0x1a)
1619  {
1620  /* Jump format: target PC is:
1621  RB & ~3 */
1622  return (get_frame_register_unsigned (frame, (insn >> 16) & 0x1f) & ~3);
1623  }
1624 
1625  if ((op & 0x30) == 0x30)
1626  {
1627  /* Branch format: target PC is:
1628  (new PC) + (4 * sext(displacement)) */
1629  if (op == 0x30 /* BR */
1630  || op == 0x34) /* BSR */
1631  {
1632  branch_taken:
1633  offset = (insn & 0x001fffff);
1634  if (offset & 0x00100000)
1635  offset |= 0xffe00000;
1636  offset *= ALPHA_INSN_SIZE;
1637  return (pc + ALPHA_INSN_SIZE + offset);
1638  }
1639 
1640  /* Need to determine if branch is taken; read RA. */
1641  regno = (insn >> 21) & 0x1f;
1642  switch (op)
1643  {
1644  case 0x31: /* FBEQ */
1645  case 0x36: /* FBGE */
1646  case 0x37: /* FBGT */
1647  case 0x33: /* FBLE */
1648  case 0x32: /* FBLT */
1649  case 0x35: /* FBNE */
1650  regno += gdbarch_fp0_regnum (gdbarch);
1651  }
1652 
1653  rav = get_frame_register_signed (frame, regno);
1654 
1655  switch (op)
1656  {
1657  case 0x38: /* BLBC */
1658  if ((rav & 1) == 0)
1659  goto branch_taken;
1660  break;
1661  case 0x3c: /* BLBS */
1662  if (rav & 1)
1663  goto branch_taken;
1664  break;
1665  case 0x39: /* BEQ */
1666  if (rav == 0)
1667  goto branch_taken;
1668  break;
1669  case 0x3d: /* BNE */
1670  if (rav != 0)
1671  goto branch_taken;
1672  break;
1673  case 0x3a: /* BLT */
1674  if (rav < 0)
1675  goto branch_taken;
1676  break;
1677  case 0x3b: /* BLE */
1678  if (rav <= 0)
1679  goto branch_taken;
1680  break;
1681  case 0x3f: /* BGT */
1682  if (rav > 0)
1683  goto branch_taken;
1684  break;
1685  case 0x3e: /* BGE */
1686  if (rav >= 0)
1687  goto branch_taken;
1688  break;
1689 
1690  /* Floating point branches. */
1691 
1692  case 0x31: /* FBEQ */
1693  if (fp_register_zero_p (rav))
1694  goto branch_taken;
1695  break;
1696  case 0x36: /* FBGE */
1697  if (fp_register_sign_bit (rav) == 0 || fp_register_zero_p (rav))
1698  goto branch_taken;
1699  break;
1700  case 0x37: /* FBGT */
1701  if (fp_register_sign_bit (rav) == 0 && ! fp_register_zero_p (rav))
1702  goto branch_taken;
1703  break;
1704  case 0x33: /* FBLE */
1705  if (fp_register_sign_bit (rav) == 1 || fp_register_zero_p (rav))
1706  goto branch_taken;
1707  break;
1708  case 0x32: /* FBLT */
1709  if (fp_register_sign_bit (rav) == 1 && ! fp_register_zero_p (rav))
1710  goto branch_taken;
1711  break;
1712  case 0x35: /* FBNE */
1713  if (! fp_register_zero_p (rav))
1714  goto branch_taken;
1715  break;
1716  }
1717  }
1718 
1719  /* Not a branch or branch not taken; target PC is:
1720  pc + 4 */
1721  return (pc + ALPHA_INSN_SIZE);
1722 }
1723 
1724 int
1726 {
1727  struct gdbarch *gdbarch = get_frame_arch (frame);
1728  struct address_space *aspace = get_frame_address_space (frame);
1729  CORE_ADDR pc, next_pc;
1730 
1731  pc = get_frame_pc (frame);
1732  next_pc = alpha_next_pc (frame, pc);
1733 
1734  insert_single_step_breakpoint (gdbarch, aspace, next_pc);
1735  return 1;
1736 }
1737 
1738 
1739 /* Initialize the current architecture based on INFO. If possible, re-use an
1740  architecture from ARCHES, which is a list of architectures already created
1741  during this debugging session.
1742 
1743  Called e.g. at program startup, when reading a core file, and when reading
1744  a binary file. */
1745 
1746 static struct gdbarch *
1747 alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1748 {
1749  struct gdbarch_tdep *tdep;
1750  struct gdbarch *gdbarch;
1751 
1752  /* Find a candidate among extant architectures. */
1753  arches = gdbarch_list_lookup_by_info (arches, &info);
1754  if (arches != NULL)
1755  return arches->gdbarch;
1756 
1757  tdep = xmalloc (sizeof (struct gdbarch_tdep));
1758  gdbarch = gdbarch_alloc (&info, tdep);
1759 
1760  /* Lowest text address. This is used by heuristic_proc_start()
1761  to decide when to stop looking. */
1762  tdep->vm_min_address = (CORE_ADDR) 0x120000000LL;
1763 
1764  tdep->dynamic_sigtramp_offset = NULL;
1765  tdep->sigcontext_addr = NULL;
1766  tdep->sc_pc_offset = 2 * 8;
1767  tdep->sc_regs_offset = 4 * 8;
1768  tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8;
1769 
1770  tdep->jb_pc = -1; /* longjmp support not enabled by default. */
1771 
1773 
1774  /* Type sizes */
1775  set_gdbarch_short_bit (gdbarch, 16);
1776  set_gdbarch_int_bit (gdbarch, 32);
1777  set_gdbarch_long_bit (gdbarch, 64);
1778  set_gdbarch_long_long_bit (gdbarch, 64);
1779  set_gdbarch_float_bit (gdbarch, 32);
1780  set_gdbarch_double_bit (gdbarch, 64);
1781  set_gdbarch_long_double_bit (gdbarch, 64);
1782  set_gdbarch_ptr_bit (gdbarch, 64);
1783 
1784  /* Register info */
1789 
1792 
1795 
1799 
1801 
1802  /* Prologue heuristics. */
1804 
1805  /* Disassembler. */
1806  set_gdbarch_print_insn (gdbarch, print_insn_alpha);
1807 
1808  /* Call info. */
1809 
1811 
1812  /* Settings for calling functions in the inferior. */
1814 
1815  /* Methods for saving / extracting a dummy frame's ID. */
1817 
1818  /* Return the unwound PC value. */
1820 
1823 
1827 
1828  /* Handles single stepping of atomic sequences. */
1830 
1831  /* Hook in ABI-specific overrides, if they have been registered. */
1832  gdbarch_init_osabi (info, gdbarch);
1833 
1834  /* Now that we have tuned the configuration, set a few final things
1835  based on what the OS ABI has told us. */
1836 
1837  if (tdep->jb_pc >= 0)
1839 
1840  frame_unwind_append_unwinder (gdbarch, &alpha_sigtramp_frame_unwind);
1841  frame_unwind_append_unwinder (gdbarch, &alpha_heuristic_frame_unwind);
1842 
1843  frame_base_set_default (gdbarch, &alpha_heuristic_frame_base);
1844 
1845  return gdbarch;
1846 }
1847 
1848 void
1849 alpha_dwarf2_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
1850 {
1851  dwarf2_append_unwinders (gdbarch);
1853 }
1854 
1855 extern initialize_file_ftype _initialize_alpha_tdep; /* -Wmissing-prototypes */
1856 
1857 void
1859 {
1860  struct cmd_list_element *c;
1861 
1862  gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
1863 
1864  /* Let the user set the fence post for heuristic_proc_start. */
1865 
1866  /* We really would like to have both "0" and "unlimited" work, but
1867  command.c doesn't deal with that. So make it a var_zinteger
1868  because the user can always use "999999" or some such for unlimited. */
1869  /* We need to throw away the frame cache when we set this, since it
1870  might change our ability to get backtraces. */
1871  add_setshow_zinteger_cmd ("heuristic-fence-post", class_support,
1872  &heuristic_fence_post, _("\
1873 Set the distance searched for the start of a function."), _("\
1874 Show the distance searched for the start of a function."), _("\
1875 If you are debugging a stripped executable, GDB needs to search through the\n\
1876 program for the start of a function. This command sets the distance of the\n\
1877 search. The only need to set it is when debugging a stripped executable."),
1879  NULL, /* FIXME: i18n: The distance searched for
1880  the start of a function is \"%d\". */
1881  &setlist, &showlist);
1882 }
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
Definition: gdbarch.c:1909
void set_gdbarch_double_bit(struct gdbarch *gdbarch, int double_bit)
Definition: gdbarch.c:1634
void set_gdbarch_cannot_fetch_register(struct gdbarch *gdbarch, gdbarch_cannot_fetch_register_ftype cannot_fetch_register)
Definition: gdbarch.c:2349
#define MEM_DISP(insn)
Definition: alpha-tdep.c:56
void set_gdbarch_value_to_register(struct gdbarch *gdbarch, gdbarch_value_to_register_ftype value_to_register)
Definition: gdbarch.c:2457
ULONGEST extract_unsigned_integer(const gdb_byte *, int, enum bfd_endian)
Definition: findvar.c:84
#define ALPHA_NUM_ARG_REGS
Definition: alpha-tdep.h:68
type_code
Definition: gdbtypes.h:85
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
Definition: frame.c:554
#define ALPHA_T9_REGNUM
Definition: alpha-tdep.h:41
void set_gdbarch_get_longjmp_target(struct gdbarch *gdbarch, gdbarch_get_longjmp_target_ftype get_longjmp_target)
Definition: gdbarch.c:2390
#define MEM_RA(insn)
Definition: alpha-tdep.c:54
static void alpha_extract_return_value(struct type *valtype, struct regcache *regcache, gdb_byte *valbuf)
Definition: alpha-tdep.c:472
struct type * builtin_func_ptr
Definition: gdbtypes.h:1544
void set_gdbarch_float_bit(struct gdbarch *gdbarch, int float_bit)
Definition: gdbarch.c:1601
CORE_ADDR get_frame_pc(struct frame_info *frame)
Definition: frame.c:2217
#define ALPHA_NUM_REGS
Definition: alpha-tdep.h:30
void add_setshow_zinteger_cmd(const char *name, enum command_class theclass, int *var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_sfunc_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
Definition: cli-decode.c:719
void set_gdbarch_fp0_regnum(struct gdbarch *gdbarch, int fp0_regnum)
Definition: gdbarch.c:2042
void alpha_supply_int_regs(struct regcache *regcache, int regno, const void *r0_r30, const void *pc, const void *unique)
Definition: alpha-tdep.c:1499
bfd_vma CORE_ADDR
Definition: common-types.h:41
void gdbarch_init_osabi(struct gdbarch_info info, struct gdbarch *gdbarch)
Definition: osabi.c:341
void alpha_fill_int_regs(const struct regcache *regcache, int regno, void *r0_r30, void *pc, void *unique)
Definition: alpha-tdep.c:1524
int(* return_in_memory)(struct type *type)
Definition: alpha-tdep.h:92
#define ALPHA_FP0_REGNUM
Definition: alpha-tdep.h:47
#define ALPHA_T12_REGNUM
Definition: alpha-tdep.h:43
struct value * trad_frame_get_prev_register(struct frame_info *this_frame, struct trad_frame_saved_reg this_saved_regs[], int regnum)
Definition: trad-frame.c:135
static struct gdbarch * alpha_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
Definition: alpha-tdep.c:1747
int trad_frame_addr_p(struct trad_frame_saved_reg this_saved_regs[], int regnum)
Definition: trad-frame.c:77
static int alpha_return_in_memory_always(struct type *type)
Definition: alpha-tdep.c:642
struct gdbarch * get_regcache_arch(const struct regcache *regcache)
Definition: regcache.c:297
struct value * frame_unwind_got_memory(struct frame_info *frame, int regnum, CORE_ADDR addr)
Definition: frame-unwind.c:228
LONGEST(* dynamic_sigtramp_offset)(struct gdbarch *, CORE_ADDR)
Definition: alpha-tdep.h:78
#define ALPHA_INSN_SIZE
Definition: alpha-tdep.h:54
void(* func)(char *)
static int alpha_cannot_fetch_register(struct gdbarch *gdbarch, int regno)
Definition: alpha-tdep.c:110
void set_gdbarch_skip_trampoline_code(struct gdbarch *gdbarch, gdbarch_skip_trampoline_code_ftype skip_trampoline_code)
Definition: gdbarch.c:3084
static int alpha_deal_with_atomic_sequence(struct frame_info *frame)
Definition: alpha-tdep.c:772
void warning(const char *fmt,...)
Definition: errors.c:26
#define ALPHA_A0_REGNUM
Definition: alpha-tdep.h:40
CORE_ADDR end
Definition: symtab.h:1377
void trad_frame_set_value(struct trad_frame_saved_reg this_saved_regs[], int regnum, LONGEST val)
Definition: trad-frame.c:92
static struct value * alpha_sigtramp_frame_prev_register(struct frame_info *this_frame, void **this_prologue_cache, int regnum)
Definition: alpha-tdep.c:969
tuple inf
Definition: arm-linux.py:13
static CORE_ADDR alpha_sigtramp_register_address(struct gdbarch *gdbarch, CORE_ADDR sigcontext_addr, int regnum)
Definition: alpha-tdep.c:908
ULONGEST frame_unwind_register_unsigned(struct frame_info *frame, int regnum)
Definition: frame.c:1182
void regcache_cooked_write_signed(struct regcache *regcache, int regnum, LONGEST val)
Definition: regcache.c:857
enum stop_kind stop_soon
Definition: inferior.h:276
void set_gdbarch_short_bit(struct gdbarch *gdbarch, int short_bit)
Definition: gdbarch.c:1483
const struct builtin_type * builtin_type(struct gdbarch *gdbarch)
Definition: gdbtypes.c:4766
void alpha_dwarf2_init_abi(struct gdbarch_info info, struct gdbarch *gdbarch)
Definition: alpha-tdep.c:1849
#define ALPHA_SP_REGNUM
Definition: alpha-tdep.h:45
void internal_error(const char *file, int line, const char *fmt,...)
Definition: errors.c:50
struct m32c_reg * pc
Definition: m32c-tdep.c:111
unsigned int alpha_read_insn(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition: alpha-tdep.c:681
return_value_convention
Definition: defs.h:206
static CORE_ADDR alpha_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition: alpha-tdep.c:701
void set_gdbarch_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype register_reggroup_p)
Definition: gdbarch.c:3350
#define INSN_OPCODE(insn)
Definition: alpha-tdep.c:51
static void alpha_heuristic_frame_this_id(struct frame_info *this_frame, void **this_prologue_cache, struct frame_id *this_id)
Definition: alpha-tdep.c:1408
CORE_ADDR(* sigcontext_addr)(struct frame_info *)
Definition: alpha-tdep.h:82
int sc_pc_offset
Definition: alpha-tdep.h:95
struct trad_frame_saved_reg * saved_regs
Definition: alpha-tdep.c:1126
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
Definition: gdbarch.c:4985
struct reggroup *const restore_reggroup
Definition: reggroups.c:298
struct address_space * get_frame_address_space(struct frame_info *frame)
Definition: frame.c:2490
struct reggroup *const all_reggroup
Definition: reggroups.c:296
static const int lda_opcode
Definition: alpha-tdep.c:59
#define _(String)
Definition: gdb_locale.h:40
ULONGEST get_frame_memory_unsigned(struct frame_info *this_frame, CORE_ADDR addr, int len)
Definition: frame.c:2515
static void alpha_sts(struct gdbarch *gdbarch, void *out, const void *in)
Definition: alpha-tdep.c:215
static int heuristic_fence_post
Definition: alpha-tdep.c:1034
struct gdbarch_tdep * gdbarch_tdep(struct gdbarch *gdbarch)
Definition: gdbarch.c:1402
static const int stq_opcode
Definition: alpha-tdep.c:60
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
Definition: frame-unwind.c:78
struct type * builtin_int32
Definition: gdbtypes.h:1518
static struct type * alpha_register_type(struct gdbarch *gdbarch, int regno)
Definition: alpha-tdep.c:123
#define FRAME_OBSTACK_ZALLOC(TYPE)
Definition: frame.h:660
void store_unsigned_integer(gdb_byte *, int, enum bfd_endian, ULONGEST)
Definition: findvar.c:212
void printf_filtered(const char *format,...)
Definition: utils.c:2388
const char * paddress(struct gdbarch *gdbarch, CORE_ADDR addr)
Definition: utils.c:2743
static void alpha_lds(struct gdbarch *gdbarch, void *out, const void *in)
Definition: alpha-tdep.c:185
#define ALPHA_UNIQUE_REGNUM
Definition: alpha-tdep.h:51
void gdbarch_register(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init, gdbarch_dump_tdep_ftype *dump_tdep)
Definition: gdbarch.c:4933
static const int bne_opcode
Definition: alpha-tdep.c:66
void memory_error(enum target_xfer_status err, CORE_ADDR memaddr)
Definition: corefile.c:217
struct reggroup *const float_reggroup
Definition: reggroups.c:293
static CORE_ADDR alpha_unwind_pc(struct gdbarch *gdbarch, struct frame_info *next_frame)
Definition: alpha-tdep.c:1486
void frame_base_set_default(struct gdbarch *gdbarch, const struct frame_base *default_base)
Definition: frame-base.c:94
struct cmd_list_element * setlist
Definition: cli-cmds.c:135
const char *const name
Definition: aarch64-tdep.c:68
int sc_regs_offset
Definition: alpha-tdep.h:96
static void alpha_sigtramp_frame_this_id(struct frame_info *this_frame, void **this_prologue_cache, struct frame_id *this_id)
Definition: alpha-tdep.c:927
void set_gdbarch_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype register_type)
Definition: gdbarch.c:2151
struct type * check_typedef(struct type *type)
Definition: gdbtypes.c:2217
const struct frame_base * dwarf2_frame_base_sniffer(struct frame_info *this_frame)
#define ALPHA_PC_REGNUM
Definition: alpha-tdep.h:50
const gdb_byte * value_contents(struct value *value)
Definition: value.c:1329
struct reggroup *const general_reggroup
Definition: reggroups.c:292
static CORE_ADDR alpha_heuristic_proc_start(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition: alpha-tdep.c:1042
static const gdb_byte * alpha_breakpoint_from_pc(struct gdbarch *gdbarch, CORE_ADDR *pc, int *len)
Definition: alpha-tdep.c:648
static int alpha_cannot_store_register(struct gdbarch *gdbarch, int regno)
Definition: alpha-tdep.c:116
void initialize_file_ftype(void)
Definition: defs.h:281
void alpha_fill_fp_regs(const struct regcache *regcache, int regno, void *f0_f30, void *fpcr)
Definition: alpha-tdep.c:1558
struct symtab_and_line find_pc_line(CORE_ADDR pc, int notcurrent)
Definition: symtab.c:3315
CORE_ADDR find_solib_trampoline_target(struct frame_info *frame, CORE_ADDR pc)
Definition: minsyms.c:1394
static CORE_ADDR alpha_next_pc(struct frame_info *frame, CORE_ADDR pc)
Definition: alpha-tdep.c:1604
enum register_status regcache_cooked_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition: regcache.c:837
struct reggroup *const system_reggroup
Definition: reggroups.c:294
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
Definition: gdbarch.c:1991
void set_gdbarch_decr_pc_after_break(struct gdbarch *gdbarch, CORE_ADDR decr_pc_after_break)
Definition: gdbarch.c:2764
void set_gdbarch_dummy_id(struct gdbarch *gdbarch, gdbarch_dummy_id_ftype dummy_id)
Definition: gdbarch.c:2175
#define OPR_RA(insn)
Definition: alpha-tdep.c:71
mach_port_t mach_port_t name mach_port_t mach_port_t name error_t int status
Definition: gnu-nat.c:1816
struct cmd_list_element * showlist
Definition: cli-cmds.c:143
struct_return
Definition: arm-tdep.h:148
struct inferior_control_state control
Definition: inferior.h:305
#define ALPHA_V0_REGNUM
Definition: alpha-tdep.h:36
static int alpha_sigtramp_frame_sniffer(const struct frame_unwind *self, struct frame_info *this_frame, void **this_prologue_cache)
Definition: alpha-tdep.c:993
static void reinit_frame_cache_sfunc(char *args, int from_tty, struct cmd_list_element *c)
Definition: alpha-tdep.c:1466
void insert_single_step_breakpoint(struct gdbarch *gdbarch, struct address_space *aspace, CORE_ADDR next_pc)
Definition: breakpoint.c:14816
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
Definition: gdbarch.c:1420
#define OPR_FUNCTION(insn)
Definition: alpha-tdep.c:69
void set_gdbarch_cannot_store_register(struct gdbarch *gdbarch, gdbarch_cannot_store_register_ftype cannot_store_register)
Definition: gdbarch.c:2366
Definition: gdbtypes.h:749
int find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr)
Definition: blockframe.c:321
LONGEST get_frame_register_signed(struct frame_info *frame, int regnum)
Definition: frame.c:1176
#define ALPHA_RA_REGNUM
Definition: alpha-tdep.h:42
const char * word
Definition: symtab.h:1448
#define ALPHA_GCC_FP_REGNUM
Definition: alpha-tdep.h:39
static enum return_value_convention alpha_return_value(struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
Definition: alpha-tdep.c:612
void set_gdbarch_register_to_value(struct gdbarch *gdbarch, gdbarch_register_to_value_ftype register_to_value)
Definition: gdbarch.c:2440
static const int subq_function
Definition: alpha-tdep.c:76
void set_gdbarch_unwind_pc(struct gdbarch *gdbarch, gdbarch_unwind_pc_ftype unwind_pc)
Definition: gdbarch.c:2863
void set_gdbarch_breakpoint_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_from_pc_ftype breakpoint_from_pc)
Definition: gdbarch.c:2672
CORE_ADDR alpha_after_prologue(CORE_ADDR pc)
Definition: alpha-tdep.c:661
int default_frame_sniffer(const struct frame_unwind *self, struct frame_info *this_frame, void **this_prologue_cache)
Definition: frame-unwind.c:170
#define ALPHA_FPCR_REGNUM
Definition: alpha-tdep.h:49
static struct frame_id alpha_dummy_id(struct gdbarch *gdbarch, struct frame_info *this_frame)
Definition: alpha-tdep.c:1478
const char * gdbarch_register_name(struct gdbarch *gdbarch, int regnr)
Definition: gdbarch.c:2117
static struct alpha_heuristic_unwind_cache * alpha_heuristic_frame_unwind_cache(struct frame_info *this_frame, void **this_prologue_cache, CORE_ADDR start_pc)
Definition: alpha-tdep.c:1232
struct value * value_cast(struct type *type, struct value *arg2)
Definition: valops.c:351
enum register_status regcache_raw_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition: regcache.c:690
static const int stl_c_opcode
Definition: alpha-tdep.c:763
struct gdbarch * gdbarch
Definition: gdbarch.h:1542
int regnum
Definition: aarch64-tdep.c:69
void read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition: corefile.c:244
static struct alpha_sigtramp_unwind_cache * alpha_sigtramp_frame_unwind_cache(struct frame_info *this_frame, void **this_prologue_cache)
Definition: alpha-tdep.c:886
ULONGEST get_frame_register_unsigned(struct frame_info *frame, int regnum)
Definition: frame.c:1194
static void alpha_value_to_register(struct frame_info *frame, int regnum, struct type *valtype, const gdb_byte *in)
Definition: alpha-tdep.c:264
void * xmalloc(YYSIZE_T)
void set_gdbarch_long_long_bit(struct gdbarch *gdbarch, int long_long_bit)
Definition: gdbarch.c:1534
LONGEST unpack_long(struct type *type, const gdb_byte *valaddr)
Definition: value.c:2797
size_t jb_elt_size
Definition: aarch64-tdep.h:83
Definition: regdef.h:22
void put_frame_register(struct frame_info *frame, int regnum, const gdb_byte *buf)
Definition: frame.c:1220
Definition: value.c:172
#define OPR_RC(insn)
Definition: alpha-tdep.c:72
#define ALPHA_ZERO_REGNUM
Definition: alpha-tdep.h:46
void set_gdbarch_software_single_step(struct gdbarch *gdbarch, gdbarch_software_single_step_ftype software_single_step)
Definition: gdbarch.c:3026
struct trad_frame_saved_reg * trad_frame_alloc_saved_regs(struct frame_info *this_frame)
Definition: trad-frame.c:52
int alpha_software_single_step(struct frame_info *frame)
Definition: alpha-tdep.c:1725
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
Definition: arch-utils.c:138
bfd_byte gdb_byte
Definition: common-types.h:38
#define OPR_HAS_IMMEDIATE(insn)
Definition: alpha-tdep.c:70
struct value * value_from_pointer(struct type *type, CORE_ADDR addr)
Definition: value.c:3490
#define ALPHA_GP_REGNUM
Definition: alpha-tdep.h:44
struct type * builtin_double
Definition: gdbtypes.h:1491
#define max(a, b)
Definition: defs.h:109
static const struct frame_unwind alpha_heuristic_frame_unwind
Definition: alpha-tdep.c:1436
void set_gdbarch_convert_register_p(struct gdbarch *gdbarch, gdbarch_convert_register_p_ftype convert_register_p)
Definition: gdbarch.c:2423
static int alpha_register_reggroup_p(struct gdbarch *gdbarch, int regnum, struct reggroup *group)
Definition: alpha-tdep.c:141
int gdbarch_fp0_regnum(struct gdbarch *gdbarch)
Definition: gdbarch.c:2032
#define TYPE_CODE(thistype)
Definition: gdbtypes.h:1240
struct value * frame_unwind_got_register(struct frame_info *frame, int regnum, int new_regnum)
Definition: frame-unwind.c:218
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
Definition: regcache.c:871
int target_read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition: target.c:1393
static int alpha_get_longjmp_target(struct frame_info *frame, CORE_ADDR *pc)
Definition: alpha-tdep.c:855
CORE_ADDR find_function_addr(struct value *function, struct type **retval_type)
Definition: infcall.c:247
struct type * builtin_data_ptr
Definition: gdbtypes.h:1533
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
Definition: gdbarch.c:1500
static CORE_ADDR alpha_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, int struct_return, CORE_ADDR struct_addr)
Definition: alpha-tdep.c:294
#define ALPHA_FPA0_REGNUM
Definition: alpha-tdep.h:48
#define OPR_LIT(insn)
Definition: alpha-tdep.c:73
int offset
Definition: agent.c:65
int code
Definition: ser-unix.c:684
void dwarf2_append_unwinders(struct gdbarch *gdbarch)
enum register_status regcache_cooked_read(struct regcache *regcache, int regnum, gdb_byte *buf)
Definition: regcache.c:737
CORE_ADDR pc
Definition: symtab.h:1376
static void alpha_store_return_value(struct type *valtype, struct regcache *regcache, const gdb_byte *valbuf)
Definition: alpha-tdep.c:541
static int * unique(int *b, int *e)
Definition: mi-main.c:627
static const int subq_opcode
Definition: alpha-tdep.c:75
struct inferior * current_inferior(void)
Definition: inferior.c:57
void regcache_raw_supply(struct regcache *regcache, int regnum, const void *buf)
Definition: regcache.c:1041
void frame_base_append_sniffer(struct gdbarch *gdbarch, frame_base_sniffer_ftype *sniffer)
Definition: frame-base.c:82
int get_frame_register_bytes(struct frame_info *frame, int regnum, CORE_ADDR offset, int len, gdb_byte *myaddr, int *optimizedp, int *unavailablep)
Definition: frame.c:1274
unsigned long long ULONGEST
Definition: common-types.h:53
enum unwind_stop_reason default_frame_unwind_stop_reason(struct frame_info *this_frame, void **this_cache)
Definition: frame-unwind.c:180
initialize_file_ftype _initialize_alpha_tdep
int register_size(struct gdbarch *gdbarch, int regnum)
Definition: regcache.c:169
void set_gdbarch_long_double_bit(struct gdbarch *gdbarch, int long_double_bit)
Definition: gdbarch.c:1667
struct type * value_type(const struct value *value)
Definition: value.c:1021
const struct frame_base * base
Definition: frame.c:133
struct type * builtin_int64
Definition: gdbtypes.h:1520
void set_gdbarch_long_bit(struct gdbarch *gdbarch, int long_bit)
Definition: gdbarch.c:1517
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype return_value)
Definition: gdbarch.c:2556
void regcache_raw_collect(const struct regcache *regcache, int regnum, void *buf)
Definition: regcache.c:1071
void set_gdbarch_cannot_step_breakpoint(struct gdbarch *gdbarch, int cannot_step_breakpoint)
Definition: gdbarch.c:3244
static int fp_register_sign_bit(LONGEST reg)
Definition: alpha-tdep.c:1591
struct reggroup *const save_reggroup
Definition: reggroups.c:297
#define TYPE_LENGTH(thistype)
Definition: gdbtypes.h:1237
static const int br_opcode
Definition: alpha-tdep.c:65
static CORE_ADDR alpha_heuristic_frame_base_address(struct frame_info *this_frame, void **this_prologue_cache)
Definition: alpha-tdep.c:1446
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
Definition: gdbarch.c:1700
CORE_ADDR vm_min_address
Definition: alpha-tdep.h:73
static const int stq_c_opcode
Definition: alpha-tdep.c:764
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype push_dummy_call)
Definition: gdbarch.c:2216
void reinit_frame_cache(void)
Definition: frame.c:1687
CORE_ADDR get_pc_function_start(CORE_ADDR pc)
Definition: blockframe.c:86
void alpha_supply_fp_regs(struct regcache *regcache, int regno, const void *f0_f30, const void *fpcr)
Definition: alpha-tdep.c:1542
#define ALPHA_REGISTER_SIZE
Definition: alpha-tdep.h:27
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
Definition: corefile.c:389
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype skip_prologue)
Definition: gdbarch.c:2590
static const int ldl_l_opcode
Definition: alpha-tdep.c:761
#define ALPHA_T7_REGNUM
Definition: alpha-tdep.h:37
enum bfd_endian byte_order
Definition: gdbarch.c:128
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
Definition: gdbarch.c:2008
#define MEM_RB(insn)
Definition: alpha-tdep.c:55
void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype register_name)
Definition: gdbarch.c:2127
CORE_ADDR get_frame_func(struct frame_info *this_frame)
Definition: frame.c:920
void error(const char *fmt,...)
Definition: errors.c:38
static int fp_register_zero_p(LONGEST reg)
Definition: alpha-tdep.c:1579
static const int ldq_l_opcode
Definition: alpha-tdep.c:762
int sc_fpregs_offset
Definition: alpha-tdep.h:97
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, struct gdbarch_tdep *tdep)
Definition: gdbarch.c:339
static struct value * alpha_heuristic_frame_prev_register(struct frame_info *this_frame, void **this_prologue_cache, int regnum)
Definition: alpha-tdep.c:1421
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype inner_than)
Definition: gdbarch.c:2655
static int alpha_register_to_value(struct frame_info *frame, int regnum, struct type *valtype, gdb_byte *out, int *optimizedp, int *unavailablep)
Definition: alpha-tdep.c:240
struct type * lookup_pointer_type(struct type *type)
Definition: gdbtypes.c:368
static const char * alpha_register_name(struct gdbarch *gdbarch, int regno)
Definition: alpha-tdep.c:87
struct gdbarch * get_frame_arch(struct frame_info *this_frame)
Definition: frame.c:2535
long long LONGEST
Definition: common-types.h:52
void regcache_cooked_write(struct regcache *regcache, int regnum, const gdb_byte *buf)
Definition: regcache.c:930
void set_gdbarch_print_insn(struct gdbarch *gdbarch, gdbarch_print_insn_ftype print_insn)
Definition: gdbarch.c:3067
static int alpha_convert_register_p(struct gdbarch *gdbarch, int regno, struct type *type)
Definition: alpha-tdep.c:232
const ULONGEST const LONGEST len
Definition: target.h:309
static void alpha_heuristic_analyze_probing_loop(struct gdbarch *gdbarch, CORE_ADDR *pc, int *frame_size)
Definition: alpha-tdep.c:1135