GDB (xrefs)
/tmp/gdb-7.10/gdb/lm32-tdep.c
Go to the documentation of this file.
1 /* Target-dependent code for Lattice Mico32 processor, for GDB.
2  Contributed by Jon Beniston <jon@beniston.com>
3 
4  Copyright (C) 2009-2015 Free Software Foundation, Inc.
5 
6  This file is part of GDB.
7 
8  This program is free software; you can redistribute it and/or modify
9  it under the terms of the GNU General Public License as published by
10  the Free Software Foundation; either version 3 of the License, or
11  (at your option) any later version.
12 
13  This program is distributed in the hope that it will be useful,
14  but WITHOUT ANY WARRANTY; without even the implied warranty of
15  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  GNU General Public License for more details.
17 
18  You should have received a copy of the GNU General Public License
19  along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 
21 #include "defs.h"
22 #include "frame.h"
23 #include "frame-unwind.h"
24 #include "frame-base.h"
25 #include "inferior.h"
26 #include "dis-asm.h"
27 #include "symfile.h"
28 #include "remote.h"
29 #include "gdbcore.h"
30 #include "gdb/sim-lm32.h"
31 #include "gdb/callback.h"
32 #include "gdb/remote-sim.h"
33 #include "sim-regno.h"
34 #include "arch-utils.h"
35 #include "regcache.h"
36 #include "trad-frame.h"
37 #include "reggroups.h"
38 #include "opcodes/lm32-desc.h"
39 
40 /* Macros to extract fields from an instruction. */
41 #define LM32_OPCODE(insn) ((insn >> 26) & 0x3f)
42 #define LM32_REG0(insn) ((insn >> 21) & 0x1f)
43 #define LM32_REG1(insn) ((insn >> 16) & 0x1f)
44 #define LM32_REG2(insn) ((insn >> 11) & 0x1f)
45 #define LM32_IMM16(insn) ((((long)insn & 0xffff) << 16) >> 16)
46 
47 struct gdbarch_tdep
48 {
49  /* gdbarch target dependent data here. Currently unused for LM32. */
50 };
51 
53 {
54  /* The frame's base. Used when constructing a frame ID. */
57  /* Size of frame. */
58  int size;
59  /* Table indicating the location of each and every register. */
61 };
62 
63 /* Add the available register groups. */
64 
65 static void
66 lm32_add_reggroups (struct gdbarch *gdbarch)
67 {
68  reggroup_add (gdbarch, general_reggroup);
69  reggroup_add (gdbarch, all_reggroup);
70  reggroup_add (gdbarch, system_reggroup);
71 }
72 
73 /* Return whether a given register is in a given group. */
74 
75 static int
76 lm32_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
77  struct reggroup *group)
78 {
79  if (group == general_reggroup)
80  return ((regnum >= SIM_LM32_R0_REGNUM) && (regnum <= SIM_LM32_RA_REGNUM))
81  || (regnum == SIM_LM32_PC_REGNUM);
82  else if (group == system_reggroup)
83  return ((regnum >= SIM_LM32_EA_REGNUM) && (regnum <= SIM_LM32_BA_REGNUM))
84  || ((regnum >= SIM_LM32_EID_REGNUM) && (regnum <= SIM_LM32_IP_REGNUM));
85  return default_register_reggroup_p (gdbarch, regnum, group);
86 }
87 
88 /* Return a name that corresponds to the given register number. */
89 
90 static const char *
91 lm32_register_name (struct gdbarch *gdbarch, int reg_nr)
92 {
93  static char *register_names[] = {
94  "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
95  "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
96  "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
97  "r24", "r25", "gp", "fp", "sp", "ra", "ea", "ba",
98  "PC", "EID", "EBA", "DEBA", "IE", "IM", "IP"
99  };
100 
101  if ((reg_nr < 0) || (reg_nr >= ARRAY_SIZE (register_names)))
102  return NULL;
103  else
104  return register_names[reg_nr];
105 }
106 
107 /* Return type of register. */
108 
109 static struct type *
110 lm32_register_type (struct gdbarch *gdbarch, int reg_nr)
111 {
112  return builtin_type (gdbarch)->builtin_int32;
113 }
114 
115 /* Return non-zero if a register can't be written. */
116 
117 static int
118 lm32_cannot_store_register (struct gdbarch *gdbarch, int regno)
119 {
120  return (regno == SIM_LM32_R0_REGNUM) || (regno == SIM_LM32_EID_REGNUM);
121 }
122 
123 /* Analyze a function's prologue. */
124 
125 static CORE_ADDR
126 lm32_analyze_prologue (struct gdbarch *gdbarch,
127  CORE_ADDR pc, CORE_ADDR limit,
128  struct lm32_frame_cache *info)
129 {
130  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
131  unsigned long instruction;
132 
133  /* Keep reading though instructions, until we come across an instruction
134  that isn't likely to be part of the prologue. */
135  info->size = 0;
136  for (; pc < limit; pc += 4)
137  {
138 
139  /* Read an instruction. */
140  instruction = read_memory_integer (pc, 4, byte_order);
141 
142  if ((LM32_OPCODE (instruction) == OP_SW)
143  && (LM32_REG0 (instruction) == SIM_LM32_SP_REGNUM))
144  {
145  /* Any stack displaced store is likely part of the prologue.
146  Record that the register is being saved, and the offset
147  into the stack. */
148  info->saved_regs[LM32_REG1 (instruction)].addr =
149  LM32_IMM16 (instruction);
150  }
151  else if ((LM32_OPCODE (instruction) == OP_ADDI)
152  && (LM32_REG1 (instruction) == SIM_LM32_SP_REGNUM))
153  {
154  /* An add to the SP is likely to be part of the prologue.
155  Adjust stack size by whatever the instruction adds to the sp. */
156  info->size -= LM32_IMM16 (instruction);
157  }
158  else if ( /* add fp,fp,sp */
159  ((LM32_OPCODE (instruction) == OP_ADD)
160  && (LM32_REG2 (instruction) == SIM_LM32_FP_REGNUM)
161  && (LM32_REG0 (instruction) == SIM_LM32_FP_REGNUM)
162  && (LM32_REG1 (instruction) == SIM_LM32_SP_REGNUM))
163  /* mv fp,imm */
164  || ((LM32_OPCODE (instruction) == OP_ADDI)
165  && (LM32_REG1 (instruction) == SIM_LM32_FP_REGNUM)
166  && (LM32_REG0 (instruction) == SIM_LM32_R0_REGNUM)))
167  {
168  /* Likely to be in the prologue for functions that require
169  a frame pointer. */
170  }
171  else
172  {
173  /* Any other instruction is likely not to be part of the
174  prologue. */
175  break;
176  }
177  }
178 
179  return pc;
180 }
181 
182 /* Return PC of first non prologue instruction, for the function at the
183  specified address. */
184 
185 static CORE_ADDR
186 lm32_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
187 {
188  CORE_ADDR func_addr, limit_pc;
189  struct lm32_frame_cache frame_info;
190  struct trad_frame_saved_reg saved_regs[SIM_LM32_NUM_REGS];
191 
192  /* See if we can determine the end of the prologue via the symbol table.
193  If so, then return either PC, or the PC after the prologue, whichever
194  is greater. */
195  if (find_pc_partial_function (pc, NULL, &func_addr, NULL))
196  {
197  CORE_ADDR post_prologue_pc
198  = skip_prologue_using_sal (gdbarch, func_addr);
199  if (post_prologue_pc != 0)
200  return max (pc, post_prologue_pc);
201  }
202 
203  /* Can't determine prologue from the symbol table, need to examine
204  instructions. */
205 
206  /* Find an upper limit on the function prologue using the debug
207  information. If the debug information could not be used to provide
208  that bound, then use an arbitrary large number as the upper bound. */
209  limit_pc = skip_prologue_using_sal (gdbarch, pc);
210  if (limit_pc == 0)
211  limit_pc = pc + 100; /* Magic. */
212 
213  frame_info.saved_regs = saved_regs;
214  return lm32_analyze_prologue (gdbarch, pc, limit_pc, &frame_info);
215 }
216 
217 /* Create a breakpoint instruction. */
218 
219 static const gdb_byte *
220 lm32_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr,
221  int *lenptr)
222 {
223  static const gdb_byte breakpoint[4] = { OP_RAISE << 2, 0, 0, 2 };
224 
225  *lenptr = sizeof (breakpoint);
226  return breakpoint;
227 }
228 
229 /* Setup registers and stack for faking a call to a function in the
230  inferior. */
231 
232 static CORE_ADDR
233 lm32_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
234  struct regcache *regcache, CORE_ADDR bp_addr,
235  int nargs, struct value **args, CORE_ADDR sp,
236  int struct_return, CORE_ADDR struct_addr)
237 {
238  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
239  int first_arg_reg = SIM_LM32_R1_REGNUM;
240  int num_arg_regs = 8;
241  int i;
242 
243  /* Set the return address. */
244  regcache_cooked_write_signed (regcache, SIM_LM32_RA_REGNUM, bp_addr);
245 
246  /* If we're returning a large struct, a pointer to the address to
247  store it at is passed as a first hidden parameter. */
248  if (struct_return)
249  {
250  regcache_cooked_write_unsigned (regcache, first_arg_reg, struct_addr);
251  first_arg_reg++;
252  num_arg_regs--;
253  sp -= 4;
254  }
255 
256  /* Setup parameters. */
257  for (i = 0; i < nargs; i++)
258  {
259  struct value *arg = args[i];
260  struct type *arg_type = check_typedef (value_type (arg));
261  gdb_byte *contents;
262  ULONGEST val;
263 
264  /* Promote small integer types to int. */
265  switch (TYPE_CODE (arg_type))
266  {
267  case TYPE_CODE_INT:
268  case TYPE_CODE_BOOL:
269  case TYPE_CODE_CHAR:
270  case TYPE_CODE_RANGE:
271  case TYPE_CODE_ENUM:
272  if (TYPE_LENGTH (arg_type) < 4)
273  {
274  arg_type = builtin_type (gdbarch)->builtin_int32;
275  arg = value_cast (arg_type, arg);
276  }
277  break;
278  }
279 
280  /* FIXME: Handle structures. */
281 
282  contents = (gdb_byte *) value_contents (arg);
283  val = extract_unsigned_integer (contents, TYPE_LENGTH (arg_type),
284  byte_order);
285 
286  /* First num_arg_regs parameters are passed by registers,
287  and the rest are passed on the stack. */
288  if (i < num_arg_regs)
289  regcache_cooked_write_unsigned (regcache, first_arg_reg + i, val);
290  else
291  {
292  write_memory (sp, (void *) &val, TYPE_LENGTH (arg_type));
293  sp -= 4;
294  }
295  }
296 
297  /* Update stack pointer. */
298  regcache_cooked_write_signed (regcache, SIM_LM32_SP_REGNUM, sp);
299 
300  /* Return adjusted stack pointer. */
301  return sp;
302 }
303 
304 /* Extract return value after calling a function in the inferior. */
305 
306 static void
308  gdb_byte *valbuf)
309 {
310  struct gdbarch *gdbarch = get_regcache_arch (regcache);
311  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
312  ULONGEST l;
313  CORE_ADDR return_buffer;
314 
315  if (TYPE_CODE (type) != TYPE_CODE_STRUCT
316  && TYPE_CODE (type) != TYPE_CODE_UNION
317  && TYPE_CODE (type) != TYPE_CODE_ARRAY && TYPE_LENGTH (type) <= 4)
318  {
319  /* Return value is returned in a single register. */
320  regcache_cooked_read_unsigned (regcache, SIM_LM32_R1_REGNUM, &l);
321  store_unsigned_integer (valbuf, TYPE_LENGTH (type), byte_order, l);
322  }
323  else if ((TYPE_CODE (type) == TYPE_CODE_INT) && (TYPE_LENGTH (type) == 8))
324  {
325  /* 64-bit values are returned in a register pair. */
326  regcache_cooked_read_unsigned (regcache, SIM_LM32_R1_REGNUM, &l);
327  memcpy (valbuf, &l, 4);
328  regcache_cooked_read_unsigned (regcache, SIM_LM32_R2_REGNUM, &l);
329  memcpy (valbuf + 4, &l, 4);
330  }
331  else
332  {
333  /* Aggregate types greater than a single register are returned
334  in memory. FIXME: Unless they are only 2 regs?. */
335  regcache_cooked_read_unsigned (regcache, SIM_LM32_R1_REGNUM, &l);
336  return_buffer = l;
337  read_memory (return_buffer, valbuf, TYPE_LENGTH (type));
338  }
339 }
340 
341 /* Write into appropriate registers a function return value of type
342  TYPE, given in virtual format. */
343 static void
345  const gdb_byte *valbuf)
346 {
347  struct gdbarch *gdbarch = get_regcache_arch (regcache);
348  enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
349  ULONGEST val;
350  int len = TYPE_LENGTH (type);
351 
352  if (len <= 4)
353  {
354  val = extract_unsigned_integer (valbuf, len, byte_order);
355  regcache_cooked_write_unsigned (regcache, SIM_LM32_R1_REGNUM, val);
356  }
357  else if (len <= 8)
358  {
359  val = extract_unsigned_integer (valbuf, 4, byte_order);
360  regcache_cooked_write_unsigned (regcache, SIM_LM32_R1_REGNUM, val);
361  val = extract_unsigned_integer (valbuf + 4, len - 4, byte_order);
362  regcache_cooked_write_unsigned (regcache, SIM_LM32_R2_REGNUM, val);
363  }
364  else
365  error (_("lm32_store_return_value: type length too large."));
366 }
367 
368 /* Determine whether a functions return value is in a register or memory. */
369 static enum return_value_convention
370 lm32_return_value (struct gdbarch *gdbarch, struct value *function,
371  struct type *valtype, struct regcache *regcache,
372  gdb_byte *readbuf, const gdb_byte *writebuf)
373 {
374  enum type_code code = TYPE_CODE (valtype);
375 
376  if (code == TYPE_CODE_STRUCT
377  || code == TYPE_CODE_UNION
378  || code == TYPE_CODE_ARRAY || TYPE_LENGTH (valtype) > 8)
380 
381  if (readbuf)
382  lm32_extract_return_value (valtype, regcache, readbuf);
383  if (writebuf)
384  lm32_store_return_value (valtype, regcache, writebuf);
385 
387 }
388 
389 static CORE_ADDR
390 lm32_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
391 {
392  return frame_unwind_register_unsigned (next_frame, SIM_LM32_PC_REGNUM);
393 }
394 
395 static CORE_ADDR
396 lm32_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
397 {
398  return frame_unwind_register_unsigned (next_frame, SIM_LM32_SP_REGNUM);
399 }
400 
401 static struct frame_id
402 lm32_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
403 {
404  CORE_ADDR sp = get_frame_register_unsigned (this_frame, SIM_LM32_SP_REGNUM);
405 
406  return frame_id_build (sp, get_frame_pc (this_frame));
407 }
408 
409 /* Put here the code to store, into fi->saved_regs, the addresses of
410  the saved registers of frame described by FRAME_INFO. This
411  includes special registers such as pc and fp saved in special ways
412  in the stack frame. sp is even more special: the address we return
413  for it IS the sp for the next frame. */
414 
415 static struct lm32_frame_cache *
416 lm32_frame_cache (struct frame_info *this_frame, void **this_prologue_cache)
417 {
418  CORE_ADDR current_pc;
419  ULONGEST prev_sp;
420  ULONGEST this_base;
421  struct lm32_frame_cache *info;
422  int i;
423 
424  if ((*this_prologue_cache))
425  return (*this_prologue_cache);
426 
427  info = FRAME_OBSTACK_ZALLOC (struct lm32_frame_cache);
428  (*this_prologue_cache) = info;
429  info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
430 
431  info->pc = get_frame_func (this_frame);
432  current_pc = get_frame_pc (this_frame);
434  info->pc, current_pc, info);
435 
436  /* Compute the frame's base, and the previous frame's SP. */
437  this_base = get_frame_register_unsigned (this_frame, SIM_LM32_SP_REGNUM);
438  prev_sp = this_base + info->size;
439  info->base = this_base;
440 
441  /* Convert callee save offsets into addresses. */
442  for (i = 0; i < gdbarch_num_regs (get_frame_arch (this_frame)) - 1; i++)
443  {
444  if (trad_frame_addr_p (info->saved_regs, i))
445  info->saved_regs[i].addr = this_base + info->saved_regs[i].addr;
446  }
447 
448  /* The call instruction moves the caller's PC in the callee's RA register.
449  Since this is an unwind, do the reverse. Copy the location of RA register
450  into PC (the address / regnum) so that a request for PC will be
451  converted into a request for the RA register. */
452  info->saved_regs[SIM_LM32_PC_REGNUM] = info->saved_regs[SIM_LM32_RA_REGNUM];
453 
454  /* The previous frame's SP needed to be computed. Save the computed
455  value. */
456  trad_frame_set_value (info->saved_regs, SIM_LM32_SP_REGNUM, prev_sp);
457 
458  return info;
459 }
460 
461 static void
462 lm32_frame_this_id (struct frame_info *this_frame, void **this_cache,
463  struct frame_id *this_id)
464 {
465  struct lm32_frame_cache *cache = lm32_frame_cache (this_frame, this_cache);
466 
467  /* This marks the outermost frame. */
468  if (cache->base == 0)
469  return;
470 
471  (*this_id) = frame_id_build (cache->base, cache->pc);
472 }
473 
474 static struct value *
476  void **this_prologue_cache, int regnum)
477 {
478  struct lm32_frame_cache *info;
479 
480  info = lm32_frame_cache (this_frame, this_prologue_cache);
481  return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
482 }
483 
484 static const struct frame_unwind lm32_frame_unwind = {
485  NORMAL_FRAME,
489  NULL,
491 };
492 
493 static CORE_ADDR
494 lm32_frame_base_address (struct frame_info *this_frame, void **this_cache)
495 {
496  struct lm32_frame_cache *info = lm32_frame_cache (this_frame, this_cache);
497 
498  return info->base;
499 }
500 
501 static const struct frame_base lm32_frame_base = {
505  lm32_frame_base_address
506 };
507 
508 static CORE_ADDR
509 lm32_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp)
510 {
511  /* Align to the size of an instruction (so that they can safely be
512  pushed onto the stack. */
513  return sp & ~3;
514 }
515 
516 static struct gdbarch *
517 lm32_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
518 {
519  struct gdbarch *gdbarch;
520  struct gdbarch_tdep *tdep;
521 
522  /* If there is already a candidate, use it. */
523  arches = gdbarch_list_lookup_by_info (arches, &info);
524  if (arches != NULL)
525  return arches->gdbarch;
526 
527  /* None found, create a new architecture from the information provided. */
528  tdep = XNEW (struct gdbarch_tdep);
529  gdbarch = gdbarch_alloc (&info, tdep);
530 
531  /* Type sizes. */
532  set_gdbarch_short_bit (gdbarch, 16);
533  set_gdbarch_int_bit (gdbarch, 32);
534  set_gdbarch_long_bit (gdbarch, 32);
535  set_gdbarch_long_long_bit (gdbarch, 64);
536  set_gdbarch_float_bit (gdbarch, 32);
537  set_gdbarch_double_bit (gdbarch, 64);
538  set_gdbarch_long_double_bit (gdbarch, 64);
539  set_gdbarch_ptr_bit (gdbarch, 32);
540 
541  /* Register info. */
542  set_gdbarch_num_regs (gdbarch, SIM_LM32_NUM_REGS);
543  set_gdbarch_sp_regnum (gdbarch, SIM_LM32_SP_REGNUM);
544  set_gdbarch_pc_regnum (gdbarch, SIM_LM32_PC_REGNUM);
548 
549  /* Frame info. */
552  set_gdbarch_decr_pc_after_break (gdbarch, 0);
553  set_gdbarch_frame_args_skip (gdbarch, 0);
554 
555  /* Frame unwinding. */
557  frame_base_set_default (gdbarch, &lm32_frame_base);
561  frame_unwind_append_unwinder (gdbarch, &lm32_frame_unwind);
562 
563  /* Breakpoints. */
566 
567  /* Calling functions in the inferior. */
570 
571  /* Instruction disassembler. */
572  set_gdbarch_print_insn (gdbarch, print_insn_lm32);
573 
574  lm32_add_reggroups (gdbarch);
576 
577  return gdbarch;
578 }
579 
580 /* -Wmissing-prototypes */
582 
583 void
585 {
586  register_gdbarch_init (bfd_arch_lm32, lm32_gdbarch_init);
587 }
void reggroup_add(struct gdbarch *gdbarch, struct reggroup *group)
Definition: reggroups.c:103
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
Definition: gdbarch.c:1909
void set_gdbarch_double_bit(struct gdbarch *gdbarch, int double_bit)
Definition: gdbarch.c:1634
void set_gdbarch_frame_align(struct gdbarch *gdbarch, gdbarch_frame_align_ftype frame_align)
Definition: gdbarch.c:2935
void set_gdbarch_have_nonsteppable_watchpoint(struct gdbarch *gdbarch, int have_nonsteppable_watchpoint)
Definition: gdbarch.c:3261
ULONGEST extract_unsigned_integer(const gdb_byte *, int, enum bfd_endian)
Definition: findvar.c:84
static const struct frame_unwind lm32_frame_unwind
Definition: lm32-tdep.c:484
type_code
Definition: gdbtypes.h:85
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
Definition: frame.c:554
static CORE_ADDR lm32_frame_align(struct gdbarch *gdbarch, CORE_ADDR sp)
Definition: lm32-tdep.c:509
void set_gdbarch_float_bit(struct gdbarch *gdbarch, int float_bit)
Definition: gdbarch.c:1601
CORE_ADDR get_frame_pc(struct frame_info *frame)
Definition: frame.c:2217
static struct lm32_frame_cache * lm32_frame_cache(struct frame_info *this_frame, void **this_prologue_cache)
Definition: lm32-tdep.c:416
bfd_vma CORE_ADDR
Definition: common-types.h:41
struct value * trad_frame_get_prev_register(struct frame_info *this_frame, struct trad_frame_saved_reg this_saved_regs[], int regnum)
Definition: trad-frame.c:135
int trad_frame_addr_p(struct trad_frame_saved_reg this_saved_regs[], int regnum)
Definition: trad-frame.c:77
struct gdbarch * get_regcache_arch(const struct regcache *regcache)
Definition: regcache.c:297
void trad_frame_set_value(struct trad_frame_saved_reg this_saved_regs[], int regnum, LONGEST val)
Definition: trad-frame.c:92
ULONGEST frame_unwind_register_unsigned(struct frame_info *frame, int regnum)
Definition: frame.c:1182
void regcache_cooked_write_signed(struct regcache *regcache, int regnum, LONGEST val)
Definition: regcache.c:857
void set_gdbarch_short_bit(struct gdbarch *gdbarch, int short_bit)
Definition: gdbarch.c:1483
const struct builtin_type * builtin_type(struct gdbarch *gdbarch)
Definition: gdbtypes.c:4766
return_value_convention
Definition: defs.h:206
void set_gdbarch_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype register_reggroup_p)
Definition: gdbarch.c:3350
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
Definition: gdbarch.c:4985
CORE_ADDR skip_prologue_using_sal(struct gdbarch *gdbarch, CORE_ADDR func_addr)
Definition: symtab.c:3882
int gdbarch_num_regs(struct gdbarch *gdbarch)
Definition: gdbarch.c:1898
struct reggroup *const all_reggroup
Definition: reggroups.c:296
#define _(String)
Definition: gdb_locale.h:40
#define LM32_IMM16(insn)
Definition: lm32-tdep.c:45
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
Definition: frame-unwind.c:78
struct type * builtin_int32
Definition: gdbtypes.h:1518
#define FRAME_OBSTACK_ZALLOC(TYPE)
Definition: frame.h:660
void store_unsigned_integer(gdb_byte *, int, enum bfd_endian, ULONGEST)
Definition: findvar.c:212
static int lm32_register_reggroup_p(struct gdbarch *gdbarch, int regnum, struct reggroup *group)
Definition: lm32-tdep.c:76
static void lm32_frame_this_id(struct frame_info *this_frame, void **this_cache, struct frame_id *this_id)
Definition: lm32-tdep.c:462
CORE_ADDR base
Definition: lm32-tdep.c:55
static CORE_ADDR lm32_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, int struct_return, CORE_ADDR struct_addr)
Definition: lm32-tdep.c:233
void frame_base_set_default(struct gdbarch *gdbarch, const struct frame_base *default_base)
Definition: frame-base.c:94
struct trad_frame_saved_reg * saved_regs
Definition: lm32-tdep.c:60
void set_gdbarch_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype register_type)
Definition: gdbarch.c:2151
struct type * check_typedef(struct type *type)
Definition: gdbtypes.c:2217
LONGEST read_memory_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
Definition: corefile.c:311
const gdb_byte * value_contents(struct value *value)
Definition: value.c:1329
struct reggroup *const general_reggroup
Definition: reggroups.c:292
void initialize_file_ftype(void)
Definition: defs.h:281
enum register_status regcache_cooked_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition: regcache.c:837
struct reggroup *const system_reggroup
Definition: reggroups.c:294
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
Definition: gdbarch.c:1991
static struct value * lm32_frame_prev_register(struct frame_info *this_frame, void **this_prologue_cache, int regnum)
Definition: lm32-tdep.c:475
void set_gdbarch_decr_pc_after_break(struct gdbarch *gdbarch, CORE_ADDR decr_pc_after_break)
Definition: gdbarch.c:2764
void set_gdbarch_dummy_id(struct gdbarch *gdbarch, gdbarch_dummy_id_ftype dummy_id)
Definition: gdbarch.c:2175
struct_return
Definition: arm-tdep.h:148
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
Definition: gdbarch.c:1420
static CORE_ADDR lm32_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition: lm32-tdep.c:186
void set_gdbarch_cannot_store_register(struct gdbarch *gdbarch, gdbarch_cannot_store_register_ftype cannot_store_register)
Definition: gdbarch.c:2366
static const gdb_byte * lm32_breakpoint_from_pc(struct gdbarch *gdbarch, CORE_ADDR *pcptr, int *lenptr)
Definition: lm32-tdep.c:220
Definition: gdbtypes.h:749
int find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr)
Definition: blockframe.c:321
void set_gdbarch_unwind_pc(struct gdbarch *gdbarch, gdbarch_unwind_pc_ftype unwind_pc)
Definition: gdbarch.c:2863
void set_gdbarch_breakpoint_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_from_pc_ftype breakpoint_from_pc)
Definition: gdbarch.c:2672
int default_frame_sniffer(const struct frame_unwind *self, struct frame_info *this_frame, void **this_prologue_cache)
Definition: frame-unwind.c:170
initialize_file_ftype _initialize_lm32_tdep
static CORE_ADDR lm32_unwind_sp(struct gdbarch *gdbarch, struct frame_info *next_frame)
Definition: lm32-tdep.c:396
struct value * value_cast(struct type *type, struct value *arg2)
Definition: valops.c:351
#define LM32_REG2(insn)
Definition: lm32-tdep.c:44
void set_gdbarch_unwind_sp(struct gdbarch *gdbarch, gdbarch_unwind_sp_ftype unwind_sp)
Definition: gdbarch.c:2887
struct gdbarch * gdbarch
Definition: gdbarch.h:1542
int regnum
Definition: aarch64-tdep.c:69
void read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition: corefile.c:244
ULONGEST get_frame_register_unsigned(struct frame_info *frame, int regnum)
Definition: frame.c:1194
void set_gdbarch_frame_args_skip(struct gdbarch *gdbarch, CORE_ADDR frame_args_skip)
Definition: gdbarch.c:2839
void set_gdbarch_long_long_bit(struct gdbarch *gdbarch, int long_long_bit)
Definition: gdbarch.c:1534
static const char * lm32_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition: lm32-tdep.c:91
Definition: value.c:172
static CORE_ADDR lm32_analyze_prologue(struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR limit, struct lm32_frame_cache *info)
Definition: lm32-tdep.c:126
static CORE_ADDR lm32_unwind_pc(struct gdbarch *gdbarch, struct frame_info *next_frame)
Definition: lm32-tdep.c:390
#define LM32_REG1(insn)
Definition: lm32-tdep.c:43
struct trad_frame_saved_reg * trad_frame_alloc_saved_regs(struct frame_info *this_frame)
Definition: trad-frame.c:52
static enum return_value_convention lm32_return_value(struct gdbarch *gdbarch, struct value *function, struct type *valtype, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
Definition: lm32-tdep.c:370
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
Definition: arch-utils.c:138
bfd_byte gdb_byte
Definition: common-types.h:38
#define max(a, b)
Definition: defs.h:109
#define TYPE_CODE(thistype)
Definition: gdbtypes.h:1240
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
Definition: regcache.c:871
static void lm32_add_reggroups(struct gdbarch *gdbarch)
Definition: lm32-tdep.c:66
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
Definition: gdbarch.c:1500
int code
Definition: ser-unix.c:684
static CORE_ADDR lm32_frame_base_address(struct frame_info *this_frame, void **this_cache)
Definition: lm32-tdep.c:494
static void lm32_extract_return_value(struct type *type, struct regcache *regcache, gdb_byte *valbuf)
Definition: lm32-tdep.c:307
static int lm32_cannot_store_register(struct gdbarch *gdbarch, int regno)
Definition: lm32-tdep.c:118
static struct type * lm32_register_type(struct gdbarch *gdbarch, int reg_nr)
Definition: lm32-tdep.c:110
static struct gdbarch * lm32_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
Definition: lm32-tdep.c:517
unsigned long long ULONGEST
Definition: common-types.h:53
enum unwind_stop_reason default_frame_unwind_stop_reason(struct frame_info *this_frame, void **this_cache)
Definition: frame-unwind.c:180
void set_gdbarch_long_double_bit(struct gdbarch *gdbarch, int long_double_bit)
Definition: gdbarch.c:1667
CORE_ADDR pc
Definition: lm32-tdep.c:56
struct type * value_type(const struct value *value)
Definition: value.c:1021
void set_gdbarch_long_bit(struct gdbarch *gdbarch, int long_bit)
Definition: gdbarch.c:1517
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype return_value)
Definition: gdbarch.c:2556
static void lm32_store_return_value(struct type *type, struct regcache *regcache, const gdb_byte *valbuf)
Definition: lm32-tdep.c:344
int default_register_reggroup_p(struct gdbarch *gdbarch, int regnum, struct reggroup *group)
Definition: reggroups.c:184
#define TYPE_LENGTH(thistype)
Definition: gdbtypes.h:1237
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
Definition: gdbarch.c:1700
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype push_dummy_call)
Definition: gdbarch.c:2216
void register_gdbarch_init(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init)
Definition: gdbarch.c:4975
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
Definition: corefile.c:389
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype skip_prologue)
Definition: gdbarch.c:2590
static struct frame_id lm32_dummy_id(struct gdbarch *gdbarch, struct frame_info *this_frame)
Definition: lm32-tdep.c:402
enum bfd_endian byte_order
Definition: gdbarch.c:128
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
Definition: gdbarch.c:2008
void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype register_name)
Definition: gdbarch.c:2127
CORE_ADDR get_frame_func(struct frame_info *this_frame)
Definition: frame.c:920
void error(const char *fmt,...)
Definition: errors.c:38
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, struct gdbarch_tdep *tdep)
Definition: gdbarch.c:339
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype inner_than)
Definition: gdbarch.c:2655
#define LM32_OPCODE(insn)
Definition: lm32-tdep.c:41
struct gdbarch * get_frame_arch(struct frame_info *this_frame)
Definition: frame.c:2535
void set_gdbarch_print_insn(struct gdbarch *gdbarch, gdbarch_print_insn_ftype print_insn)
Definition: gdbarch.c:3067
#define LM32_REG0(insn)
Definition: lm32-tdep.c:42
const ULONGEST const LONGEST len
Definition: target.h:309