GDB (xrefs)
/tmp/gdb-7.10/gdb/aarch64-linux-nat.c
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1 /* Native-dependent code for GNU/Linux AArch64.
2 
3  Copyright (C) 2011-2015 Free Software Foundation, Inc.
4  Contributed by ARM Ltd.
5 
6  This file is part of GDB.
7 
8  This program is free software; you can redistribute it and/or modify
9  it under the terms of the GNU General Public License as published by
10  the Free Software Foundation; either version 3 of the License, or
11  (at your option) any later version.
12 
13  This program is distributed in the hope that it will be useful,
14  but WITHOUT ANY WARRANTY; without even the implied warranty of
15  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  GNU General Public License for more details.
17 
18  You should have received a copy of the GNU General Public License
19  along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 
21 #include "defs.h"
22 
23 #include "inferior.h"
24 #include "gdbcore.h"
25 #include "regcache.h"
26 #include "linux-nat.h"
27 #include "target-descriptions.h"
28 #include "auxv.h"
29 #include "gdbcmd.h"
30 #include "aarch64-tdep.h"
31 #include "aarch64-linux-tdep.h"
32 #include "elf/common.h"
33 
34 #include <sys/ptrace.h>
35 #include <sys/utsname.h>
36 #include <asm/ptrace.h>
37 
38 #include "gregset.h"
39 
40 /* Defines ps_err_e, struct ps_prochandle. */
41 #include "gdb_proc_service.h"
42 
43 #ifndef TRAP_HWBKPT
44 #define TRAP_HWBKPT 0x0004
45 #endif
46 
47 /* On GNU/Linux, threads are implemented as pseudo-processes, in which
48  case we may be tracing more than one process at a time. In that
49  case, inferior_ptid will contain the main process ID and the
50  individual thread (process) ID. get_thread_id () is used to get
51  the thread id if it's available, and the process id otherwise. */
52 
53 static int
55 {
56  int tid = ptid_get_lwp (ptid);
57 
58  if (0 == tid)
59  tid = ptid_get_pid (ptid);
60  return tid;
61 }
62 
63 /* Macro definitions, data structures, and code for the hardware
64  breakpoint and hardware watchpoint support follow. We use the
65  following abbreviations throughout the code:
66 
67  hw - hardware
68  bp - breakpoint
69  wp - watchpoint */
70 
71 /* Maximum number of hardware breakpoint and watchpoint registers.
72  Neither of these values may exceed the width of dr_changed_t
73  measured in bits. */
74 
75 #define AARCH64_HBP_MAX_NUM 16
76 #define AARCH64_HWP_MAX_NUM 16
77 
78 /* Alignment requirement in bytes for addresses written to
79  hardware breakpoint and watchpoint value registers.
80 
81  A ptrace call attempting to set an address that does not meet the
82  alignment criteria will fail. Limited support has been provided in
83  this port for unaligned watchpoints, such that from a GDB user
84  perspective, an unaligned watchpoint may be requested.
85 
86  This is achieved by minimally enlarging the watched area to meet the
87  alignment requirement, and if necessary, splitting the watchpoint
88  over several hardware watchpoint registers. */
89 
90 #define AARCH64_HBP_ALIGNMENT 4
91 #define AARCH64_HWP_ALIGNMENT 8
92 
93 /* The maximum length of a memory region that can be watched by one
94  hardware watchpoint register. */
95 
96 #define AARCH64_HWP_MAX_LEN_PER_REG 8
97 
98 /* ptrace hardware breakpoint resource info is formatted as follows:
99 
100  31 24 16 8 0
101  +---------------+--------------+---------------+---------------+
102  | RESERVED | RESERVED | DEBUG_ARCH | NUM_SLOTS |
103  +---------------+--------------+---------------+---------------+ */
104 
105 
106 /* Macros to extract fields from the hardware debug information word. */
107 #define AARCH64_DEBUG_NUM_SLOTS(x) ((x) & 0xff)
108 #define AARCH64_DEBUG_ARCH(x) (((x) >> 8) & 0xff)
109 
110 /* Macro for the expected version of the ARMv8-A debug architecture. */
111 #define AARCH64_DEBUG_ARCH_V8 0x6
112 
113 /* Number of hardware breakpoints/watchpoints the target supports.
114  They are initialized with values obtained via the ptrace calls
115  with NT_ARM_HW_BREAK and NT_ARM_HW_WATCH respectively. */
116 
119 
120 /* Each bit of a variable of this type is used to indicate whether a
121  hardware breakpoint or watchpoint setting has been changed since
122  the last update.
123 
124  Bit N corresponds to the Nth hardware breakpoint or watchpoint
125  setting which is managed in aarch64_debug_reg_state, where N is
126  valid between 0 and the total number of the hardware breakpoint or
127  watchpoint debug registers minus 1.
128 
129  When bit N is 1, the corresponding breakpoint or watchpoint setting
130  has changed, and therefore the corresponding hardware debug
131  register needs to be updated via the ptrace interface.
132 
133  In the per-thread arch-specific data area, we define two such
134  variables for per-thread hardware breakpoint and watchpoint
135  settings respectively.
136 
137  This type is part of the mechanism which helps reduce the number of
138  ptrace calls to the kernel, i.e. avoid asking the kernel to write
139  to the debug registers with unchanged values. */
140 
142 
143 /* Set each of the lower M bits of X to 1; assert X is wide enough. */
144 
145 #define DR_MARK_ALL_CHANGED(x, m) \
146  do \
147  { \
148  gdb_assert (sizeof ((x)) * 8 >= (m)); \
149  (x) = (((dr_changed_t)1 << (m)) - 1); \
150  } while (0)
151 
152 #define DR_MARK_N_CHANGED(x, n) \
153  do \
154  { \
155  (x) |= ((dr_changed_t)1 << (n)); \
156  } while (0)
157 
158 #define DR_CLEAR_CHANGED(x) \
159  do \
160  { \
161  (x) = 0; \
162  } while (0)
163 
164 #define DR_HAS_CHANGED(x) ((x) != 0)
165 #define DR_N_HAS_CHANGED(x, n) ((x) & ((dr_changed_t)1 << (n)))
166 
167 /* Structure for managing the hardware breakpoint/watchpoint resources.
168  DR_ADDR_* stores the address, DR_CTRL_* stores the control register
169  content, and DR_REF_COUNT_* counts the numbers of references to the
170  corresponding bp/wp, by which way the limited hardware resources
171  are not wasted on duplicated bp/wp settings (though so far gdb has
172  done a good job by not sending duplicated bp/wp requests). */
173 
175 {
176  /* hardware breakpoint */
180 
181  /* hardware watchpoint */
185 };
186 
187 /* Per-process data. We don't bind this to a per-inferior registry
188  because of targets like x86 GNU/Linux that need to keep track of
189  processes that aren't bound to any inferior (e.g., fork children,
190  checkpoints). */
191 
193 {
194  /* Linked list. */
196 
197  /* The process identifier. */
198  pid_t pid;
199 
200  /* Copy of aarch64 hardware debug registers. */
202 };
203 
204 static struct aarch64_process_info *aarch64_process_list = NULL;
205 
206 /* Find process data for process PID. */
207 
208 static struct aarch64_process_info *
210 {
211  struct aarch64_process_info *proc;
212 
213  for (proc = aarch64_process_list; proc; proc = proc->next)
214  if (proc->pid == pid)
215  return proc;
216 
217  return NULL;
218 }
219 
220 /* Add process data for process PID. Returns newly allocated info
221  object. */
222 
223 static struct aarch64_process_info *
225 {
226  struct aarch64_process_info *proc;
227 
228  proc = xcalloc (1, sizeof (*proc));
229  proc->pid = pid;
230 
231  proc->next = aarch64_process_list;
232  aarch64_process_list = proc;
233 
234  return proc;
235 }
236 
237 /* Get data specific info for process PID, creating it if necessary.
238  Never returns NULL. */
239 
240 static struct aarch64_process_info *
242 {
243  struct aarch64_process_info *proc;
244 
245  proc = aarch64_find_process_pid (pid);
246  if (proc == NULL)
247  proc = aarch64_add_process (pid);
248 
249  return proc;
250 }
251 
252 /* Called whenever GDB is no longer debugging process PID. It deletes
253  data structures that keep track of debug register state. */
254 
255 static void
257 {
258  struct aarch64_process_info *proc, **proc_link;
259 
260  proc = aarch64_process_list;
261  proc_link = &aarch64_process_list;
262 
263  while (proc != NULL)
264  {
265  if (proc->pid == pid)
266  {
267  *proc_link = proc->next;
268 
269  xfree (proc);
270  return;
271  }
272 
273  proc_link = &proc->next;
274  proc = *proc_link;
275  }
276 }
277 
278 /* Get debug registers state for process PID. */
279 
280 static struct aarch64_debug_reg_state *
282 {
283  return &aarch64_process_info_get (pid)->state;
284 }
285 
286 /* Per-thread arch-specific data we want to keep. */
287 
289 {
290  /* When bit N is 1, it indicates the Nth hardware breakpoint or
291  watchpoint register pair needs to be updated when the thread is
292  resumed; see aarch64_linux_prepare_to_resume. */
295 };
296 
297 /* Call ptrace to set the thread TID's hardware breakpoint/watchpoint
298  registers with data from *STATE. */
299 
300 static void
302  int tid, int watchpoint)
303 {
304  int i, count;
305  struct iovec iov;
306  struct user_hwdebug_state regs;
307  const CORE_ADDR *addr;
308  const unsigned int *ctrl;
309 
310  memset (&regs, 0, sizeof (regs));
311  iov.iov_base = &regs;
312  count = watchpoint ? aarch64_num_wp_regs : aarch64_num_bp_regs;
313  addr = watchpoint ? state->dr_addr_wp : state->dr_addr_bp;
314  ctrl = watchpoint ? state->dr_ctrl_wp : state->dr_ctrl_bp;
315  if (count == 0)
316  return;
317  iov.iov_len = (offsetof (struct user_hwdebug_state, dbg_regs[count - 1])
318  + sizeof (regs.dbg_regs [count - 1]));
319 
320  for (i = 0; i < count; i++)
321  {
322  regs.dbg_regs[i].addr = addr[i];
323  regs.dbg_regs[i].ctrl = ctrl[i];
324  }
325 
326  if (ptrace (PTRACE_SETREGSET, tid,
327  watchpoint ? NT_ARM_HW_WATCH : NT_ARM_HW_BREAK,
328  (void *) &iov))
329  error (_("Unexpected error setting hardware debug registers"));
330 }
331 
333 {
335  unsigned int idx;
336 };
337 
338 /* Callback for iterate_over_lwps. Records the
339  information about the change of one hardware breakpoint/watchpoint
340  setting for the thread LWP.
341  The information is passed in via PTR.
342  N.B. The actual updating of hardware debug registers is not
343  carried out until the moment the thread is resumed. */
344 
345 static int
346 debug_reg_change_callback (struct lwp_info *lwp, void *ptr)
347 {
348  struct aarch64_dr_update_callback_param *param_p
349  = (struct aarch64_dr_update_callback_param *) ptr;
350  int pid = get_thread_id (lwp->ptid);
351  int idx = param_p->idx;
352  int is_watchpoint = param_p->is_watchpoint;
353  struct arch_lwp_info *info = lwp->arch_private;
354  dr_changed_t *dr_changed_ptr;
355  dr_changed_t dr_changed;
356 
357  if (info == NULL)
358  info = lwp->arch_private = XCNEW (struct arch_lwp_info);
359 
360  if (show_debug_regs)
361  {
363  "debug_reg_change_callback: \n\tOn entry:\n");
365  "\tpid%d, dr_changed_bp=0x%s, "
366  "dr_changed_wp=0x%s\n",
367  pid, phex (info->dr_changed_bp, 8),
368  phex (info->dr_changed_wp, 8));
369  }
370 
371  dr_changed_ptr = is_watchpoint ? &info->dr_changed_wp
372  : &info->dr_changed_bp;
373  dr_changed = *dr_changed_ptr;
374 
375  gdb_assert (idx >= 0
376  && (idx <= (is_watchpoint ? aarch64_num_wp_regs
377  : aarch64_num_bp_regs)));
378 
379  /* The actual update is done later just before resuming the lwp,
380  we just mark that one register pair needs updating. */
381  DR_MARK_N_CHANGED (dr_changed, idx);
382  *dr_changed_ptr = dr_changed;
383 
384  /* If the lwp isn't stopped, force it to momentarily pause, so
385  we can update its debug registers. */
386  if (!lwp->stopped)
387  linux_stop_lwp (lwp);
388 
389  if (show_debug_regs)
390  {
392  "\tOn exit:\n\tpid%d, dr_changed_bp=0x%s, "
393  "dr_changed_wp=0x%s\n",
394  pid, phex (info->dr_changed_bp, 8),
395  phex (info->dr_changed_wp, 8));
396  }
397 
398  /* Continue the iteration. */
399  return 0;
400 }
401 
402 /* Notify each thread that their IDXth breakpoint/watchpoint register
403  pair needs to be updated. The message will be recorded in each
404  thread's arch-specific data area, the actual updating will be done
405  when the thread is resumed. */
406 
407 static void
409  int is_watchpoint, unsigned int idx)
410 {
413 
415  param.idx = idx;
416 
417  iterate_over_lwps (pid_ptid, debug_reg_change_callback, (void *) &param);
418 }
419 
420 /* Print the values of the cached breakpoint/watchpoint registers. */
421 
422 static void
424  const char *func, CORE_ADDR addr,
425  int len, int type)
426 {
427  int i;
428 
429  fprintf_unfiltered (gdb_stdlog, "%s", func);
430  if (addr || len)
431  fprintf_unfiltered (gdb_stdlog, " (addr=0x%08lx, len=%d, type=%s)",
432  (unsigned long) addr, len,
433  type == hw_write ? "hw-write-watchpoint"
434  : (type == hw_read ? "hw-read-watchpoint"
435  : (type == hw_access ? "hw-access-watchpoint"
436  : (type == hw_execute ? "hw-breakpoint"
437  : "??unknown??"))));
439 
440  fprintf_unfiltered (gdb_stdlog, "\tBREAKPOINTs:\n");
441  for (i = 0; i < aarch64_num_bp_regs; i++)
443  "\tBP%d: addr=0x%08lx, ctrl=0x%08x, ref.count=%d\n",
444  i, state->dr_addr_bp[i],
445  state->dr_ctrl_bp[i], state->dr_ref_count_bp[i]);
446 
447  fprintf_unfiltered (gdb_stdlog, "\tWATCHPOINTs:\n");
448  for (i = 0; i < aarch64_num_wp_regs; i++)
450  "\tWP%d: addr=0x%08lx, ctrl=0x%08x, ref.count=%d\n",
451  i, state->dr_addr_wp[i],
452  state->dr_ctrl_wp[i], state->dr_ref_count_wp[i]);
453 }
454 
455 /* Fill GDB's register array with the general-purpose register values
456  from the current thread. */
457 
458 static void
460 {
461  int ret, regno, tid;
462  elf_gregset_t regs;
463  struct iovec iovec;
464 
466 
467  iovec.iov_base = &regs;
468  iovec.iov_len = sizeof (regs);
469 
470  ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
471  if (ret < 0)
472  perror_with_name (_("Unable to fetch general registers."));
473 
474  for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
475  regcache_raw_supply (regcache, regno,
476  (char *) &regs[regno - AARCH64_X0_REGNUM]);
477 }
478 
479 /* Store to the current thread the valid general-purpose register
480  values in the GDB's register array. */
481 
482 static void
484 {
485  int ret, regno, tid;
486  elf_gregset_t regs;
487  struct iovec iovec;
488 
490 
491  iovec.iov_base = &regs;
492  iovec.iov_len = sizeof (regs);
493 
494  ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
495  if (ret < 0)
496  perror_with_name (_("Unable to fetch general registers."));
497 
498  for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
499  if (REG_VALID == regcache_register_status (regcache, regno))
500  regcache_raw_collect (regcache, regno,
501  (char *) &regs[regno - AARCH64_X0_REGNUM]);
502 
503  ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec);
504  if (ret < 0)
505  perror_with_name (_("Unable to store general registers."));
506 }
507 
508 /* Fill GDB's register array with the fp/simd register values
509  from the current thread. */
510 
511 static void
513 {
514  int ret, regno, tid;
515  elf_fpregset_t regs;
516  struct iovec iovec;
517 
519 
520  iovec.iov_base = &regs;
521  iovec.iov_len = sizeof (regs);
522 
523  ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
524  if (ret < 0)
525  perror_with_name (_("Unable to fetch FP/SIMD registers."));
526 
527  for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
528  regcache_raw_supply (regcache, regno,
529  (char *) &regs.vregs[regno - AARCH64_V0_REGNUM]);
530 
531  regcache_raw_supply (regcache, AARCH64_FPSR_REGNUM, (char *) &regs.fpsr);
532  regcache_raw_supply (regcache, AARCH64_FPCR_REGNUM, (char *) &regs.fpcr);
533 }
534 
535 /* Store to the current thread the valid fp/simd register
536  values in the GDB's register array. */
537 
538 static void
540 {
541  int ret, regno, tid;
542  elf_fpregset_t regs;
543  struct iovec iovec;
544 
546 
547  iovec.iov_base = &regs;
548  iovec.iov_len = sizeof (regs);
549 
550  ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
551  if (ret < 0)
552  perror_with_name (_("Unable to fetch FP/SIMD registers."));
553 
554  for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
555  if (REG_VALID == regcache_register_status (regcache, regno))
556  regcache_raw_collect (regcache, regno,
557  (char *) &regs.vregs[regno - AARCH64_V0_REGNUM]);
558 
560  regcache_raw_collect (regcache, AARCH64_FPSR_REGNUM, (char *) &regs.fpsr);
562  regcache_raw_collect (regcache, AARCH64_FPCR_REGNUM, (char *) &regs.fpcr);
563 
564  ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iovec);
565  if (ret < 0)
566  perror_with_name (_("Unable to store FP/SIMD registers."));
567 }
568 
569 /* Implement the "to_fetch_register" target_ops method. */
570 
571 static void
573  struct regcache *regcache,
574  int regno)
575 {
576  if (regno == -1)
577  {
578  fetch_gregs_from_thread (regcache);
579  fetch_fpregs_from_thread (regcache);
580  }
581  else if (regno < AARCH64_V0_REGNUM)
582  fetch_gregs_from_thread (regcache);
583  else
584  fetch_fpregs_from_thread (regcache);
585 }
586 
587 /* Implement the "to_store_register" target_ops method. */
588 
589 static void
591  struct regcache *regcache,
592  int regno)
593 {
594  if (regno == -1)
595  {
596  store_gregs_to_thread (regcache);
597  store_fpregs_to_thread (regcache);
598  }
599  else if (regno < AARCH64_V0_REGNUM)
600  store_gregs_to_thread (regcache);
601  else
602  store_fpregs_to_thread (regcache);
603 }
604 
605 /* Fill register REGNO (if it is a general-purpose register) in
606  *GREGSETPS with the value in GDB's register array. If REGNO is -1,
607  do this for all registers. */
608 
609 void
611  gdb_gregset_t *gregsetp, int regno)
612 {
614  regno, (gdb_byte *) gregsetp,
616 }
617 
618 /* Fill GDB's register array with the general-purpose register values
619  in *GREGSETP. */
620 
621 void
622 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
623 {
625  (const gdb_byte *) gregsetp,
627 }
628 
629 /* Fill register REGNO (if it is a floating-point register) in
630  *FPREGSETP with the value in GDB's register array. If REGNO is -1,
631  do this for all registers. */
632 
633 void
635  gdb_fpregset_t *fpregsetp, int regno)
636 {
638  regno, (gdb_byte *) fpregsetp,
640 }
641 
642 /* Fill GDB's register array with the floating-point register values
643  in *FPREGSETP. */
644 
645 void
646 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
647 {
649  (const gdb_byte *) fpregsetp,
651 }
652 
653 /* Called when resuming a thread.
654  The hardware debug registers are updated when there is any change. */
655 
656 static void
658 {
659  struct arch_lwp_info *info = lwp->arch_private;
660 
661  /* NULL means this is the main thread still going through the shell,
662  or, no watchpoint has been set yet. In that case, there's
663  nothing to do. */
664  if (info == NULL)
665  return;
666 
667  if (DR_HAS_CHANGED (info->dr_changed_bp)
668  || DR_HAS_CHANGED (info->dr_changed_wp))
669  {
670  int tid = ptid_get_lwp (lwp->ptid);
671  struct aarch64_debug_reg_state *state
673 
674  if (show_debug_regs)
675  fprintf_unfiltered (gdb_stdlog, "prepare_to_resume thread %d\n", tid);
676 
677  /* Watchpoints. */
678  if (DR_HAS_CHANGED (info->dr_changed_wp))
679  {
680  aarch64_linux_set_debug_regs (state, tid, 1);
682  }
683 
684  /* Breakpoints. */
685  if (DR_HAS_CHANGED (info->dr_changed_bp))
686  {
687  aarch64_linux_set_debug_regs (state, tid, 0);
689  }
690  }
691 }
692 
693 static void
695 {
696  struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
697 
698  /* Mark that all the hardware breakpoint/watchpoint register pairs
699  for this thread need to be initialized. */
702 
703  lp->arch_private = info;
704 }
705 
706 /* linux_nat_new_fork hook. */
707 
708 static void
709 aarch64_linux_new_fork (struct lwp_info *parent, pid_t child_pid)
710 {
711  pid_t parent_pid;
712  struct aarch64_debug_reg_state *parent_state;
713  struct aarch64_debug_reg_state *child_state;
714 
715  /* NULL means no watchpoint has ever been set in the parent. In
716  that case, there's nothing to do. */
717  if (parent->arch_private == NULL)
718  return;
719 
720  /* GDB core assumes the child inherits the watchpoints/hw
721  breakpoints of the parent, and will remove them all from the
722  forked off process. Copy the debug registers mirrors into the
723  new process so that all breakpoints and watchpoints can be
724  removed together. */
725 
726  parent_pid = ptid_get_pid (parent->ptid);
727  parent_state = aarch64_get_debug_reg_state (parent_pid);
728  child_state = aarch64_get_debug_reg_state (child_pid);
729  *child_state = *parent_state;
730 }
731 
732 
733 /* Called by libthread_db. Returns a pointer to the thread local
734  storage (or its descriptor). */
735 
736 ps_err_e
738  lwpid_t lwpid, int idx, void **base)
739 {
740  struct iovec iovec;
741  uint64_t reg;
742 
743  iovec.iov_base = &reg;
744  iovec.iov_len = sizeof (reg);
745 
746  if (ptrace (PTRACE_GETREGSET, lwpid, NT_ARM_TLS, &iovec) != 0)
747  return PS_ERR;
748 
749  /* IDX is the bias from the thread pointer to the beginning of the
750  thread descriptor. It has to be subtracted due to implementation
751  quirks in libthread_db. */
752  *base = (void *) (reg - idx);
753 
754  return PS_OK;
755 }
756 
757 
758 /* Get the hardware debug register capacity information. */
759 
760 static void
762 {
763  int tid;
764  struct iovec iov;
765  struct user_hwdebug_state dreg_state;
766 
768  iov.iov_base = &dreg_state;
769  iov.iov_len = sizeof (dreg_state);
770 
771  /* Get hardware watchpoint register info. */
772  if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_HW_WATCH, &iov) == 0
773  && AARCH64_DEBUG_ARCH (dreg_state.dbg_info) == AARCH64_DEBUG_ARCH_V8)
774  {
775  aarch64_num_wp_regs = AARCH64_DEBUG_NUM_SLOTS (dreg_state.dbg_info);
777  {
778  warning (_("Unexpected number of hardware watchpoint registers"
779  " reported by ptrace, got %d, expected %d."),
782  }
783  }
784  else
785  {
786  warning (_("Unable to determine the number of hardware watchpoints"
787  " available."));
789  }
790 
791  /* Get hardware breakpoint register info. */
792  if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_HW_BREAK, &iov) == 0
793  && AARCH64_DEBUG_ARCH (dreg_state.dbg_info) == AARCH64_DEBUG_ARCH_V8)
794  {
795  aarch64_num_bp_regs = AARCH64_DEBUG_NUM_SLOTS (dreg_state.dbg_info);
797  {
798  warning (_("Unexpected number of hardware breakpoint registers"
799  " reported by ptrace, got %d, expected %d."),
802  }
803  }
804  else
805  {
806  warning (_("Unable to determine the number of hardware breakpoints"
807  " available."));
809  }
810 }
811 
812 static void (*super_post_startup_inferior) (struct target_ops *self,
813  ptid_t ptid);
814 
815 /* Implement the "to_post_startup_inferior" target_ops method. */
816 
817 static void
819  ptid_t ptid)
820 {
823  super_post_startup_inferior (self, ptid);
824 }
825 
826 /* Implement the "to_read_description" target_ops method. */
827 
828 static const struct target_desc *
830 {
831  return tdesc_aarch64;
832 }
833 
834 /* Given the (potentially unaligned) watchpoint address in ADDR and
835  length in LEN, return the aligned address and aligned length in
836  *ALIGNED_ADDR_P and *ALIGNED_LEN_P, respectively. The returned
837  aligned address and length will be valid values to write to the
838  hardware watchpoint value and control registers.
839 
840  The given watchpoint may get truncated if more than one hardware
841  register is needed to cover the watched region. *NEXT_ADDR_P
842  and *NEXT_LEN_P, if non-NULL, will return the address and length
843  of the remaining part of the watchpoint (which can be processed
844  by calling this routine again to generate another aligned address
845  and length pair.
846 
847  See the comment above the function of the same name in
848  gdbserver/linux-aarch64-low.c for more information. */
849 
850 static void
851 aarch64_align_watchpoint (CORE_ADDR addr, int len, CORE_ADDR *aligned_addr_p,
852  int *aligned_len_p, CORE_ADDR *next_addr_p,
853  int *next_len_p)
854 {
855  int aligned_len;
856  unsigned int offset;
857  CORE_ADDR aligned_addr;
858  const unsigned int alignment = AARCH64_HWP_ALIGNMENT;
859  const unsigned int max_wp_len = AARCH64_HWP_MAX_LEN_PER_REG;
860 
861  /* As assumed by the algorithm. */
862  gdb_assert (alignment == max_wp_len);
863 
864  if (len <= 0)
865  return;
866 
867  /* Address to be put into the hardware watchpoint value register
868  must be aligned. */
869  offset = addr & (alignment - 1);
870  aligned_addr = addr - offset;
871 
872  gdb_assert (offset >= 0 && offset < alignment);
873  gdb_assert (aligned_addr >= 0 && aligned_addr <= addr);
874  gdb_assert (offset + len > 0);
875 
876  if (offset + len >= max_wp_len)
877  {
878  /* Need more than one watchpoint registers; truncate it at the
879  alignment boundary. */
880  aligned_len = max_wp_len;
881  len -= (max_wp_len - offset);
882  addr += (max_wp_len - offset);
883  gdb_assert ((addr & (alignment - 1)) == 0);
884  }
885  else
886  {
887  /* Find the smallest valid length that is large enough to
888  accommodate this watchpoint. */
889  static const unsigned char
890  aligned_len_array[AARCH64_HWP_MAX_LEN_PER_REG] =
891  { 1, 2, 4, 4, 8, 8, 8, 8 };
892 
893  aligned_len = aligned_len_array[offset + len - 1];
894  addr += len;
895  len = 0;
896  }
897 
898  if (aligned_addr_p)
899  *aligned_addr_p = aligned_addr;
900  if (aligned_len_p)
901  *aligned_len_p = aligned_len;
902  if (next_addr_p)
903  *next_addr_p = addr;
904  if (next_len_p)
905  *next_len_p = len;
906 }
907 
908 /* Returns the number of hardware watchpoints of type TYPE that we can
909  set. Value is positive if we can set CNT watchpoints, zero if
910  setting watchpoints of type TYPE is not supported, and negative if
911  CNT is more than the maximum number of watchpoints of type TYPE
912  that we can support. TYPE is one of bp_hardware_watchpoint,
913  bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
914  CNT is the number of such watchpoints used so far (including this
915  one). OTHERTYPE is non-zero if other types of watchpoints are
916  currently enabled.
917 
918  We always return 1 here because we don't have enough information
919  about possible overlap of addresses that they want to watch. As an
920  extreme example, consider the case where all the watchpoints watch
921  the same address and the same region length: then we can handle a
922  virtually unlimited number of watchpoints, due to debug register
923  sharing implemented via reference counts. */
924 
925 static int
927  int type, int cnt, int othertype)
928 {
929  return 1;
930 }
931 
932 /* ptrace expects control registers to be formatted as follows:
933 
934  31 13 5 3 1 0
935  +--------------------------------+----------+------+------+----+
936  | RESERVED (SBZ) | LENGTH | TYPE | PRIV | EN |
937  +--------------------------------+----------+------+------+----+
938 
939  The TYPE field is ignored for breakpoints. */
940 
941 #define DR_CONTROL_ENABLED(ctrl) (((ctrl) & 0x1) == 1)
942 #define DR_CONTROL_LENGTH(ctrl) (((ctrl) >> 5) & 0xff)
943 
944 /* Utility function that returns the length in bytes of a watchpoint
945  according to the content of a hardware debug control register CTRL.
946  Note that the kernel currently only supports the following Byte
947  Address Select (BAS) values: 0x1, 0x3, 0xf and 0xff, which means
948  that for a hardware watchpoint, its valid length can only be 1
949  byte, 2 bytes, 4 bytes or 8 bytes. */
950 
951 static inline unsigned int
952 aarch64_watchpoint_length (unsigned int ctrl)
953 {
954  switch (DR_CONTROL_LENGTH (ctrl))
955  {
956  case 0x01:
957  return 1;
958  case 0x03:
959  return 2;
960  case 0x0f:
961  return 4;
962  case 0xff:
963  return 8;
964  default:
965  return 0;
966  }
967 }
968 
969 /* Given the hardware breakpoint or watchpoint type TYPE and its
970  length LEN, return the expected encoding for a hardware
971  breakpoint/watchpoint control register. */
972 
973 static unsigned int
975 {
976  unsigned int ctrl, ttype;
977 
978  /* type */
979  switch (type)
980  {
981  case hw_write:
982  ttype = 2;
983  break;
984  case hw_read:
985  ttype = 1;
986  break;
987  case hw_access:
988  ttype = 3;
989  break;
990  case hw_execute:
991  ttype = 0;
992  break;
993  default:
994  perror_with_name (_("Unrecognized breakpoint/watchpoint type"));
995  }
996  ctrl = ttype << 3;
997 
998  /* length bitmask */
999  ctrl |= ((1 << len) - 1) << 5;
1000  /* enabled at el0 */
1001  ctrl |= (2 << 1) | 1;
1002 
1003  return ctrl;
1004 }
1005 
1006 /* Addresses to be written to the hardware breakpoint and watchpoint
1007  value registers need to be aligned; the alignment is 4-byte and
1008  8-type respectively. Linux kernel rejects any non-aligned address
1009  it receives from the related ptrace call. Furthermore, the kernel
1010  currently only supports the following Byte Address Select (BAS)
1011  values: 0x1, 0x3, 0xf and 0xff, which means that for a hardware
1012  watchpoint to be accepted by the kernel (via ptrace call), its
1013  valid length can only be 1 byte, 2 bytes, 4 bytes or 8 bytes.
1014  Despite these limitations, the unaligned watchpoint is supported in
1015  this port.
1016 
1017  Return 0 for any non-compliant ADDR and/or LEN; return 1 otherwise. */
1018 
1019 static int
1021 {
1022  unsigned int alignment = is_watchpoint ? AARCH64_HWP_ALIGNMENT
1024 
1025  if (addr & (alignment - 1))
1026  return 0;
1027 
1028  if (len != 8 && len != 4 && len != 2 && len != 1)
1029  return 0;
1030 
1031  return 1;
1032 }
1033 
1034 /* Record the insertion of one breakpoint/watchpoint, as represented
1035  by ADDR and CTRL, in the cached debug register state area *STATE. */
1036 
1037 static int
1039  int type, CORE_ADDR addr, int len)
1040 {
1041  int i, idx, num_regs, is_watchpoint;
1042  unsigned int ctrl, *dr_ctrl_p, *dr_ref_count;
1043  CORE_ADDR *dr_addr_p;
1044 
1045  /* Set up state pointers. */
1046  is_watchpoint = (type != hw_execute);
1047  gdb_assert (aarch64_point_is_aligned (is_watchpoint, addr, len));
1048  if (is_watchpoint)
1049  {
1050  num_regs = aarch64_num_wp_regs;
1051  dr_addr_p = state->dr_addr_wp;
1052  dr_ctrl_p = state->dr_ctrl_wp;
1053  dr_ref_count = state->dr_ref_count_wp;
1054  }
1055  else
1056  {
1057  num_regs = aarch64_num_bp_regs;
1058  dr_addr_p = state->dr_addr_bp;
1059  dr_ctrl_p = state->dr_ctrl_bp;
1060  dr_ref_count = state->dr_ref_count_bp;
1061  }
1062 
1063  ctrl = aarch64_point_encode_ctrl_reg (type, len);
1064 
1065  /* Find an existing or free register in our cache. */
1066  idx = -1;
1067  for (i = 0; i < num_regs; ++i)
1068  {
1069  if ((dr_ctrl_p[i] & 1) == 0)
1070  {
1071  gdb_assert (dr_ref_count[i] == 0);
1072  idx = i;
1073  /* no break; continue hunting for an existing one. */
1074  }
1075  else if (dr_addr_p[i] == addr && dr_ctrl_p[i] == ctrl)
1076  {
1077  gdb_assert (dr_ref_count[i] != 0);
1078  idx = i;
1079  break;
1080  }
1081  }
1082 
1083  /* No space. */
1084  if (idx == -1)
1085  return -1;
1086 
1087  /* Update our cache. */
1088  if ((dr_ctrl_p[idx] & 1) == 0)
1089  {
1090  /* new entry */
1091  dr_addr_p[idx] = addr;
1092  dr_ctrl_p[idx] = ctrl;
1093  dr_ref_count[idx] = 1;
1094  /* Notify the change. */
1095  aarch64_notify_debug_reg_change (state, is_watchpoint, idx);
1096  }
1097  else
1098  {
1099  /* existing entry */
1100  dr_ref_count[idx]++;
1101  }
1102 
1103  return 0;
1104 }
1105 
1106 /* Record the removal of one breakpoint/watchpoint, as represented by
1107  ADDR and CTRL, in the cached debug register state area *STATE. */
1108 
1109 static int
1111  int type, CORE_ADDR addr, int len)
1112 {
1113  int i, num_regs, is_watchpoint;
1114  unsigned int ctrl, *dr_ctrl_p, *dr_ref_count;
1115  CORE_ADDR *dr_addr_p;
1116 
1117  /* Set up state pointers. */
1118  is_watchpoint = (type != hw_execute);
1119  gdb_assert (aarch64_point_is_aligned (is_watchpoint, addr, len));
1120  if (is_watchpoint)
1121  {
1122  num_regs = aarch64_num_wp_regs;
1123  dr_addr_p = state->dr_addr_wp;
1124  dr_ctrl_p = state->dr_ctrl_wp;
1125  dr_ref_count = state->dr_ref_count_wp;
1126  }
1127  else
1128  {
1129  num_regs = aarch64_num_bp_regs;
1130  dr_addr_p = state->dr_addr_bp;
1131  dr_ctrl_p = state->dr_ctrl_bp;
1132  dr_ref_count = state->dr_ref_count_bp;
1133  }
1134 
1135  ctrl = aarch64_point_encode_ctrl_reg (type, len);
1136 
1137  /* Find the entry that matches the ADDR and CTRL. */
1138  for (i = 0; i < num_regs; ++i)
1139  if (dr_addr_p[i] == addr && dr_ctrl_p[i] == ctrl)
1140  {
1141  gdb_assert (dr_ref_count[i] != 0);
1142  break;
1143  }
1144 
1145  /* Not found. */
1146  if (i == num_regs)
1147  return -1;
1148 
1149  /* Clear our cache. */
1150  if (--dr_ref_count[i] == 0)
1151  {
1152  /* Clear the enable bit. */
1153  ctrl &= ~1;
1154  dr_addr_p[i] = 0;
1155  dr_ctrl_p[i] = ctrl;
1156  /* Notify the change. */
1157  aarch64_notify_debug_reg_change (state, is_watchpoint, i);
1158  }
1159 
1160  return 0;
1161 }
1162 
1163 /* Implement insertion and removal of a single breakpoint. */
1164 
1165 static int
1166 aarch64_handle_breakpoint (int type, CORE_ADDR addr, int len, int is_insert)
1167 {
1168  struct aarch64_debug_reg_state *state;
1169 
1170  /* The hardware breakpoint on AArch64 should always be 4-byte
1171  aligned. */
1172  if (!aarch64_point_is_aligned (0 /* is_watchpoint */ , addr, len))
1173  return -1;
1174 
1176 
1177  if (is_insert)
1178  return aarch64_dr_state_insert_one_point (state, type, addr, len);
1179  else
1180  return aarch64_dr_state_remove_one_point (state, type, addr, len);
1181 }
1182 
1183 /* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address.
1184  Return 0 on success, -1 on failure. */
1185 
1186 static int
1188  struct gdbarch *gdbarch,
1189  struct bp_target_info *bp_tgt)
1190 {
1191  int ret;
1192  CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
1193  const int len = 4;
1194  const int type = hw_execute;
1195 
1196  if (show_debug_regs)
1198  (gdb_stdlog,
1199  "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
1200  (unsigned long) addr, len);
1201 
1202  ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */);
1203 
1204  if (show_debug_regs)
1205  {
1206  struct aarch64_debug_reg_state *state
1208 
1210  "insert_hw_breakpoint", addr, len, type);
1211  }
1212 
1213  return ret;
1214 }
1215 
1216 /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
1217  Return 0 on success, -1 on failure. */
1218 
1219 static int
1221  struct gdbarch *gdbarch,
1222  struct bp_target_info *bp_tgt)
1223 {
1224  int ret;
1225  CORE_ADDR addr = bp_tgt->placed_address;
1226  const int len = 4;
1227  const int type = hw_execute;
1228 
1229  if (show_debug_regs)
1231  (gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
1232  (unsigned long) addr, len);
1233 
1234  ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */);
1235 
1236  if (show_debug_regs)
1237  {
1238  struct aarch64_debug_reg_state *state
1240 
1242  "remove_hw_watchpoint", addr, len, type);
1243  }
1244 
1245  return ret;
1246 }
1247 
1248 /* This is essentially the same as aarch64_handle_breakpoint, apart
1249  from that it is an aligned watchpoint to be handled. */
1250 
1251 static int
1253  int is_insert)
1254 {
1255  struct aarch64_debug_reg_state *state
1257 
1258  if (is_insert)
1259  return aarch64_dr_state_insert_one_point (state, type, addr, len);
1260  else
1261  return aarch64_dr_state_remove_one_point (state, type, addr, len);
1262 }
1263 
1264 /* Insert/remove unaligned watchpoint by calling
1265  aarch64_align_watchpoint repeatedly until the whole watched region,
1266  as represented by ADDR and LEN, has been properly aligned and ready
1267  to be written to one or more hardware watchpoint registers.
1268  IS_INSERT indicates whether this is an insertion or a deletion.
1269  Return 0 if succeed. */
1270 
1271 static int
1273  int is_insert)
1274 {
1275  struct aarch64_debug_reg_state *state
1277 
1278  while (len > 0)
1279  {
1280  CORE_ADDR aligned_addr;
1281  int aligned_len, ret;
1282 
1283  aarch64_align_watchpoint (addr, len, &aligned_addr, &aligned_len,
1284  &addr, &len);
1285 
1286  if (is_insert)
1287  ret = aarch64_dr_state_insert_one_point (state, type, aligned_addr,
1288  aligned_len);
1289  else
1290  ret = aarch64_dr_state_remove_one_point (state, type, aligned_addr,
1291  aligned_len);
1292 
1293  if (show_debug_regs)
1295 "handle_unaligned_watchpoint: is_insert: %d\n"
1296 " aligned_addr: 0x%08lx, aligned_len: %d\n"
1297 " next_addr: 0x%08lx, next_len: %d\n",
1298  is_insert, aligned_addr, aligned_len, addr, len);
1299 
1300  if (ret != 0)
1301  return ret;
1302  }
1303 
1304  return 0;
1305 }
1306 
1307 /* Implements insertion and removal of a single watchpoint. */
1308 
1309 static int
1310 aarch64_handle_watchpoint (int type, CORE_ADDR addr, int len, int is_insert)
1311 {
1312  if (aarch64_point_is_aligned (1 /* is_watchpoint */ , addr, len))
1313  return aarch64_handle_aligned_watchpoint (type, addr, len, is_insert);
1314  else
1315  return aarch64_handle_unaligned_watchpoint (type, addr, len, is_insert);
1316 }
1317 
1318 /* Implement the "to_insert_watchpoint" target_ops method.
1319 
1320  Insert a watchpoint to watch a memory region which starts at
1321  address ADDR and whose length is LEN bytes. Watch memory accesses
1322  of the type TYPE. Return 0 on success, -1 on failure. */
1323 
1324 static int
1326  CORE_ADDR addr, int len, int type,
1327  struct expression *cond)
1328 {
1329  int ret;
1330 
1331  if (show_debug_regs)
1333  "insert_watchpoint on entry (addr=0x%08lx, len=%d)\n",
1334  (unsigned long) addr, len);
1335 
1336  gdb_assert (type != hw_execute);
1337 
1338  ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */);
1339 
1340  if (show_debug_regs)
1341  {
1342  struct aarch64_debug_reg_state *state
1344 
1346  "insert_watchpoint", addr, len, type);
1347  }
1348 
1349  return ret;
1350 }
1351 
1352 /* Implement the "to_remove_watchpoint" target_ops method.
1353  Remove a watchpoint that watched the memory region which starts at
1354  address ADDR, whose length is LEN bytes, and for accesses of the
1355  type TYPE. Return 0 on success, -1 on failure. */
1356 
1357 static int
1359  CORE_ADDR addr, int len, int type,
1360  struct expression *cond)
1361 {
1362  int ret;
1363 
1364  if (show_debug_regs)
1366  "remove_watchpoint on entry (addr=0x%08lx, len=%d)\n",
1367  (unsigned long) addr, len);
1368 
1369  gdb_assert (type != hw_execute);
1370 
1371  ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */);
1372 
1373  if (show_debug_regs)
1374  {
1375  struct aarch64_debug_reg_state *state
1377 
1379  "remove_watchpoint", addr, len, type);
1380  }
1381 
1382  return ret;
1383 }
1384 
1385 /* Implement the "to_region_ok_for_hw_watchpoint" target_ops method. */
1386 
1387 static int
1389  CORE_ADDR addr, int len)
1390 {
1391  CORE_ADDR aligned_addr;
1392 
1393  /* Can not set watchpoints for zero or negative lengths. */
1394  if (len <= 0)
1395  return 0;
1396 
1397  /* Must have hardware watchpoint debug register(s). */
1398  if (aarch64_num_wp_regs == 0)
1399  return 0;
1400 
1401  /* We support unaligned watchpoint address and arbitrary length,
1402  as long as the size of the whole watched area after alignment
1403  doesn't exceed size of the total area that all watchpoint debug
1404  registers can watch cooperatively.
1405 
1406  This is a very relaxed rule, but unfortunately there are
1407  limitations, e.g. false-positive hits, due to limited support of
1408  hardware debug registers in the kernel. See comment above
1409  aarch64_align_watchpoint for more information. */
1410 
1411  aligned_addr = addr & ~(AARCH64_HWP_MAX_LEN_PER_REG - 1);
1413  < addr + len)
1414  return 0;
1415 
1416  /* All tests passed so we are likely to be able to set the watchpoint.
1417  The reason that it is 'likely' rather than 'must' is because
1418  we don't check the current usage of the watchpoint registers, and
1419  there may not be enough registers available for this watchpoint.
1420  Ideally we should check the cached debug register state, however
1421  the checking is costly. */
1422  return 1;
1423 }
1424 
1425 /* Implement the "to_stopped_data_address" target_ops method. */
1426 
1427 static int
1429  CORE_ADDR *addr_p)
1430 {
1431  siginfo_t siginfo;
1432  int i, tid;
1433  struct aarch64_debug_reg_state *state;
1434 
1435  if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
1436  return 0;
1437 
1438  /* This must be a hardware breakpoint. */
1439  if (siginfo.si_signo != SIGTRAP
1440  || (siginfo.si_code & 0xffff) != TRAP_HWBKPT)
1441  return 0;
1442 
1443  /* Check if the address matches any watched address. */
1445  for (i = aarch64_num_wp_regs - 1; i >= 0; --i)
1446  {
1447  const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]);
1448  const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr;
1449  const CORE_ADDR addr_watch = state->dr_addr_wp[i];
1450 
1451  if (state->dr_ref_count_wp[i]
1452  && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i])
1453  && addr_trap >= addr_watch
1454  && addr_trap < addr_watch + len)
1455  {
1456  *addr_p = addr_trap;
1457  return 1;
1458  }
1459  }
1460 
1461  return 0;
1462 }
1463 
1464 /* Implement the "to_stopped_by_watchpoint" target_ops method. */
1465 
1466 static int
1468 {
1469  CORE_ADDR addr;
1470 
1471  return aarch64_linux_stopped_data_address (ops, &addr);
1472 }
1473 
1474 /* Implement the "to_watchpoint_addr_within_range" target_ops method. */
1475 
1476 static int
1478  CORE_ADDR addr,
1479  CORE_ADDR start, int length)
1480 {
1481  return start <= addr && start + length - 1 >= addr;
1482 }
1483 
1484 /* Define AArch64 maintenance commands. */
1485 
1486 static void
1488 {
1489  /* A maintenance command to enable printing the internal DRi mirror
1490  variables. */
1491  add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
1492  &show_debug_regs, _("\
1493 Set whether to show variables that mirror the AArch64 debug registers."), _("\
1494 Show whether to show variables that mirror the AArch64 debug registers."), _("\
1495 Use \"on\" to enable, \"off\" to disable.\n\
1496 If enabled, the debug registers values are shown when GDB inserts\n\
1497 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
1498 triggers a breakpoint or watchpoint."),
1499  NULL,
1500  NULL,
1503 }
1504 
1505 /* -Wmissing-prototypes. */
1506 void _initialize_aarch64_linux_nat (void);
1507 
1508 void
1510 {
1511  struct target_ops *t;
1512 
1513  /* Fill in the generic GNU/Linux methods. */
1514  t = linux_target ();
1515 
1517 
1518  /* Add our register access methods. */
1521 
1523 
1535 
1536  /* Override the GNU/Linux inferior startup hook. */
1539 
1540  /* Register the target. */
1546 }
unsigned int lwpid_t
static const struct target_desc * aarch64_linux_read_description(struct target_ops *ops)
struct arch_lwp_info * arch_private
Definition: linux-nat.h:107
static unsigned int aarch64_point_encode_ctrl_reg(int type, int len)
CORE_ADDR reqstd_address
Definition: breakpoint.h:235
static int aarch64_linux_insert_watchpoint(struct target_ops *self, CORE_ADDR addr, int len, int type, struct expression *cond)
const struct target_desc *(* to_read_description)(struct target_ops *ops) TARGET_DEFAULT_RETURN(NULL)
Definition: target.h:769
static int aarch64_linux_remove_watchpoint(struct target_ops *self, CORE_ADDR addr, int len, int type, struct expression *cond)
static struct aarch64_debug_reg_state * aarch64_get_debug_reg_state(pid_t pid)
bfd_vma CORE_ADDR
Definition: common-types.h:41
#define AARCH64_HBP_MAX_NUM
static void fetch_fpregs_from_thread(struct regcache *regcache)
#define DR_MARK_N_CHANGED(x, n)
static void store_gregs_to_thread(const struct regcache *regcache)
void fill_gregset(const struct regcache *regcache, gdb_gregset_t *gregsetp, int regno)
void linux_stop_lwp(struct lwp_info *lwp)
Definition: linux-nat.c:2378
void xfree(void *)
Definition: common-utils.c:97
#define TRAP_HWBKPT
void(* func)(char *)
if(!(yy_init))
Definition: ada-lex.c:1072
static int get_thread_id(ptid_t ptid)
void linux_nat_set_new_thread(struct target_ops *t, void(*new_thread)(struct lwp_info *))
Definition: linux-nat.c:5040
void warning(const char *fmt,...)
Definition: errors.c:26
unsigned int dr_ref_count_wp[AARCH64_HWP_MAX_NUM]
ptid_t ptid
Definition: linux-nat.h:34
static void aarch64_linux_child_post_startup_inferior(struct target_ops *self, ptid_t ptid)
static unsigned int aarch64_watchpoint_length(unsigned int ctrl)
static int dr_ref_count[4]
Definition: go32-nat.c:230
void regcache_supply_regset(const struct regset *regset, struct regcache *regcache, int regnum, const void *buf, size_t size)
Definition: regcache.c:1149
static void add_show_debug_regs_command(void)
static int aarch64_handle_breakpoint(int type, CORE_ADDR addr, int len, int is_insert)
ps_err_e
static int aarch64_handle_unaligned_watchpoint(int type, CORE_ADDR addr, int len, int is_insert)
#define DR_CONTROL_LENGTH(ctrl)
int(* to_region_ok_for_hw_watchpoint)(struct target_ops *, CORE_ADDR, int) TARGET_DEFAULT_FUNC(default_region_ok_for_hw_watchpoint)
Definition: target.h:554
#define _(String)
Definition: gdb_locale.h:40
int linux_nat_get_siginfo(ptid_t ptid, siginfo_t *siginfo)
Definition: linux-nat.c:5104
static void aarch64_linux_prepare_to_resume(struct lwp_info *lwp)
void linux_nat_set_new_fork(struct target_ops *t, linux_nat_new_fork_ftype *new_fork)
Definition: linux-nat.c:5052
static int aarch64_linux_can_use_hw_breakpoint(struct target_ops *self, int type, int cnt, int othertype)
struct target_desc * tdesc_aarch64
Definition: aarch64.c:8
void fill_fpregset(const struct regcache *regcache, gdb_fpregset_t *fpregsetp, int regno)
struct cmd_list_element * maintenance_set_cmdlist
Definition: maint.c:646
static void aarch64_linux_set_debug_regs(const struct aarch64_debug_reg_state *state, int tid, int watchpoint)
PTRACE_TYPE_RET ptrace()
Definition: ptid.h:35
static void aarch64_linux_new_thread(struct lwp_info *lp)
static int debug_reg_change_callback(struct lwp_info *lwp, void *ptr)
int(* to_insert_watchpoint)(struct target_ops *, CORE_ADDR, int, int, struct expression *) TARGET_DEFAULT_RETURN(-1)
Definition: target.h:532
static int aarch64_linux_stopped_data_address(struct target_ops *target, CORE_ADDR *addr_p)
static int aarch64_point_is_aligned(int is_watchpoint, CORE_ADDR addr, int len)
static int aarch64_linux_region_ok_for_hw_watchpoint(struct target_ops *self, CORE_ADDR addr, int len)
static int aarch64_handle_watchpoint(int type, CORE_ADDR addr, int len, int is_insert)
Definition: gnu-nat.h:42
static int aarch64_num_bp_regs
static int aarch64_dr_state_remove_one_point(struct aarch64_debug_reg_state *state, int type, CORE_ADDR addr, int len)
int(* to_watchpoint_addr_within_range)(struct target_ops *, CORE_ADDR, CORE_ADDR, int) TARGET_DEFAULT_FUNC(default_watchpoint_addr_within_range)
Definition: target.h:548
static int aarch64_linux_insert_hw_breakpoint(struct target_ops *self, struct gdbarch *gdbarch, struct bp_target_info *bp_tgt)
GDB_GREGSET_T gdb_gregset_t
Definition: gregset.h:34
#define AARCH64_DEBUG_NUM_SLOTS(x)
static struct aarch64_process_info * aarch64_add_process(pid_t pid)
static void store_fpregs_to_thread(const struct regcache *regcache)
int(* to_remove_watchpoint)(struct target_ops *, CORE_ADDR, int, int, struct expression *) TARGET_DEFAULT_RETURN(-1)
Definition: target.h:529
int is_watchpoint(const struct breakpoint *bpt)
Definition: breakpoint.c:1695
void fprintf_unfiltered(struct ui_file *stream, const char *format,...)
Definition: utils.c:2361
int show_debug_regs
Definition: common-debug.c:25
GDB_FPREGSET_T gdb_fpregset_t
Definition: gregset.h:35
ptid_t pid_to_ptid(int pid)
Definition: ptid.c:44
#define AARCH64_HWP_MAX_LEN_PER_REG
void supply_gregset(struct regcache *regcache, const gdb_gregset_t *gregsetp)
void linux_nat_set_prepare_to_resume(struct target_ops *t, void(*prepare_to_resume)(struct lwp_info *))
Definition: linux-nat.c:5094
Definition: gdbtypes.h:749
void regcache_collect_regset(const struct regset *regset, const struct regcache *regcache, int regnum, void *buf, size_t size)
Definition: regcache.c:1162
#define DR_MARK_ALL_CHANGED(x, m)
static void aarch64_linux_store_inferior_registers(struct target_ops *ops, struct regcache *regcache, int regno)
#define gdb_assert(expr)
Definition: gdb_assert.h:33
void linux_nat_add_target(struct target_ops *t)
Definition: linux-nat.c:4972
int stopped
Definition: linux-nat.h:50
#define PTRACE_SETREGSET
Definition: linux-ptrace.h:51
static int aarch64_linux_watchpoint_addr_within_range(struct target_ops *target, CORE_ADDR addr, CORE_ADDR start, int length)
#define DR_HAS_CHANGED(x)
ps_err_e ps_get_thread_area(const struct ps_prochandle *ph, lwpid_t lwpid, int idx, void **base)
void _initialize_aarch64_linux_nat(void)
struct aarch64_process_info * next
CORE_ADDR placed_address
Definition: breakpoint.h:232
CORE_ADDR dr_addr_bp[AARCH64_HBP_MAX_NUM]
struct target_ops * linux_target(void)
Definition: linux-nat.c:4544
struct ui_file * gdb_stdlog
Definition: main.c:73
int(* to_insert_hw_breakpoint)(struct target_ops *, struct gdbarch *, struct bp_target_info *) TARGET_DEFAULT_RETURN(-1)
Definition: target.h:520
static void aarch64_forget_process(pid_t pid)
#define PTRACE_GETREGSET
Definition: linux-ptrace.h:47
Definition: regdef.h:22
static struct aarch64_process_info * aarch64_process_info_get(pid_t pid)
int ptid_get_pid(ptid_t ptid)
Definition: ptid.c:52
const struct regset aarch64_linux_gregset
int(* to_remove_hw_breakpoint)(struct target_ops *, struct gdbarch *, struct bp_target_info *) TARGET_DEFAULT_RETURN(-1)
Definition: target.h:523
bfd_byte gdb_byte
Definition: common-types.h:38
static void aarch64_align_watchpoint(CORE_ADDR addr, int len, CORE_ADDR *aligned_addr_p, int *aligned_len_p, CORE_ADDR *next_addr_p, int *next_len_p)
static struct aarch64_process_info * aarch64_process_list
void(* to_fetch_registers)(struct target_ops *, struct regcache *, int) TARGET_DEFAULT_IGNORE()
Definition: target.h:472
static void fetch_gregs_from_thread(struct regcache *regcache)
void void void void void void void void void perror_with_name(const char *string) ATTRIBUTE_NORETURN
Definition: utils.c:979
enum register_status regcache_register_status(const struct regcache *regcache, int regnum)
Definition: regcache.c:446
int(* to_can_use_hw_breakpoint)(struct target_ops *, int, int, int) TARGET_DEFAULT_RETURN(0)
Definition: target.h:516
static void aarch64_linux_fetch_inferior_registers(struct target_ops *ops, struct regcache *regcache, int regno)
#define AARCH64_LINUX_SIZEOF_FPREGSET
static int aarch64_num_wp_regs
static int aarch64_handle_aligned_watchpoint(int type, CORE_ADDR addr, int len, int is_insert)
ptid_t inferior_ptid
Definition: infcmd.c:124
static int aarch64_dr_state_insert_one_point(struct aarch64_debug_reg_state *state, int type, CORE_ADDR addr, int len)
int offset
Definition: agent.c:65
dr_changed_t dr_changed_wp
static struct aarch64_process_info * aarch64_find_process_pid(pid_t pid)
int(* to_stopped_by_watchpoint)(struct target_ops *) TARGET_DEFAULT_RETURN(0)
Definition: target.h:542
#define AARCH64_LINUX_SIZEOF_GREGSET
#define AARCH64_DEBUG_ARCH(x)
unsigned int dr_ref_count_bp[AARCH64_HBP_MAX_NUM]
unsigned int dr_ctrl_wp[AARCH64_HWP_MAX_NUM]
void regcache_raw_supply(struct regcache *regcache, int regnum, const void *buf)
Definition: regcache.c:1041
#define AARCH64_HWP_MAX_NUM
unsigned long long ULONGEST
Definition: common-types.h:53
#define AARCH64_DEBUG_ARCH_V8
static void aarch64_linux_get_debug_reg_capacity(void)
long ptid_get_lwp(ptid_t ptid)
Definition: ptid.c:60
void regcache_raw_collect(const struct regcache *regcache, int regnum, void *buf)
Definition: regcache.c:1071
#define DR_CONTROL_ENABLED(ctrl)
struct aarch64_debug_reg_state state
static int aarch64_linux_stopped_by_watchpoint(struct target_ops *ops)
void linux_nat_set_forget_process(struct target_ops *t, linux_nat_forget_process_ftype *fn)
Definition: linux-nat.c:5062
static int aarch64_linux_remove_hw_breakpoint(struct target_ops *self, struct gdbarch *gdbarch, struct bp_target_info *bp_tgt)
static void aarch64_notify_debug_reg_change(const struct aarch64_debug_reg_state *state, int is_watchpoint, unsigned int idx)
static void aarch64_show_debug_reg_state(struct aarch64_debug_reg_state *state, const char *func, CORE_ADDR addr, int len, int type)
int(* to_stopped_data_address)(struct target_ops *, CORE_ADDR *) TARGET_DEFAULT_RETURN(0)
Definition: target.h:546
dr_changed_t dr_changed_bp
static void(* super_post_startup_inferior)(struct target_ops *self, ptid_t ptid)
void(* to_store_registers)(struct target_ops *, struct regcache *, int) TARGET_DEFAULT_NORETURN(noprocess())
Definition: target.h:474
struct lwp_info * iterate_over_lwps(ptid_t filter, iterate_over_lwps_ftype callback, void *data)
Definition: linux-nat.c:910
#define AARCH64_HBP_ALIGNMENT
PTR xcalloc(size_t number, size_t size)
Definition: common-utils.c:71
#define AARCH64_HWP_ALIGNMENT
struct cmd_list_element * maintenance_show_cmdlist
Definition: maint.c:647
static void aarch64_linux_new_fork(struct lwp_info *parent, pid_t child_pid)
ULONGEST dr_changed_t
void error(const char *fmt,...)
Definition: errors.c:38
unsigned int dr_ctrl_bp[AARCH64_HBP_MAX_NUM]
const struct regset aarch64_linux_fpregset
mach_port_t mach_port_t name mach_port_t mach_port_t name error_t int int rusage_t pid_t pid
Definition: gnu-nat.c:1818
void add_setshow_boolean_cmd(const char *name, enum command_class theclass, int *var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_sfunc_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
Definition: cli-decode.c:541
void(* to_post_startup_inferior)(struct target_ops *, ptid_t) TARGET_DEFAULT_IGNORE()
Definition: target.h:586
void supply_fpregset(struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
const ULONGEST const LONGEST len
Definition: target.h:309
CORE_ADDR dr_addr_wp[AARCH64_HWP_MAX_NUM]
#define DR_CLEAR_CHANGED(x)